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target-arm
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cpu-qom.h
Age
Commit message (
Expand
)
Author
Files
Lines
2014-09-25
target-arm: Use cpu_exec_interrupt qom hook
Richard Henderson
1
-0
/
+1
2014-08-19
target-arm: Adjust debug ID registers per-CPU
Peter Maydell
1
-0
/
+1
2014-07-08
target-arm: Implement vCPU reset via KVM_ARM_VCPU_INIT for 32-bit CPUs
Peter Maydell
1
-4
/
+0
2014-06-19
target-arm: Introduce per-CPU field for PSCI version
Pranavkumar Sawargaonkar
1
-0
/
+6
2014-06-19
target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64
Pranavkumar Sawargaonkar
1
-0
/
+3
2014-04-17
target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32
Peter Maydell
1
-2
/
+0
2014-04-17
target-arm: Implement CBAR for Cortex-A57
Peter Maydell
1
-1
/
+1
2014-04-17
target-arm: Implement RVBAR register
Peter Maydell
1
-0
/
+1
2014-04-17
target-arm: Implement ARMv8 MVFR registers
Peter Maydell
1
-0
/
+1
2014-04-17
target-arm: Implement AArch64 EL1 exception handling
Rob Herring
1
-0
/
+2
2014-04-17
target-arm: A64: Implement DC ZVA
Peter Maydell
1
-0
/
+2
2014-02-26
target-arm: Implement AArch64 ID and feature registers
Peter Maydell
1
-0
/
+10
2013-12-17
ARM: cpu: add "reset_hivecs" property
Antony Pavlov
1
-0
/
+1
2013-12-10
target-arm: Don't hardcode KVM target CPU to be A15
Peter Maydell
1
-0
/
+5
2013-12-10
target-arm: Allow secondary KVM CPUs to be booted via PSCI
Peter Maydell
1
-0
/
+3
2013-12-10
target-arm: Add ARMCPU field for Linux device-tree 'compatible' string
Peter Maydell
1
-0
/
+3
2013-09-10
target-arm: Add AArch64 gdbstub support
Alexander Graf
1
-0
/
+2
2013-09-10
target-arm: Add AArch64 translation stub
Alexander Graf
1
-0
/
+5
2013-09-10
target-arm: Add new AArch64CPUInfo base class and subclasses
Peter Maydell
1
-0
/
+12
2013-08-20
target-arm: Implement the generic timer
Peter Maydell
1
-0
/
+9
2013-07-27
cpu: Introduce CPUClass::gdb_{read,write}_register()
Andreas Färber
1
-0
/
+3
2013-07-23
cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
Andreas Färber
1
-0
/
+2
2013-07-09
cpu: Drop unnecessary dynamic casts in *_env_get_cpu()
Andreas Färber
1
-1
/
+1
2013-06-28
cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks
Andreas Färber
1
-0
/
+3
2013-06-25
target-arm: Reinitialize all KVM VCPU registers on reset
Peter Maydell
1
-1
/
+5
2013-06-25
target-arm: Convert TCG to using (index,value) list for cp migration
Peter Maydell
1
-0
/
+20
2013-04-19
target-arm: port ARM CPU save/load to use VMState
Juan Quintela
1
-0
/
+4
2013-03-12
target-arm: Override do_interrupt for ARMv7-M profile
Andreas Färber
1
-0
/
+1
2013-03-12
cpu: Replace do_interrupt() by CPUClass::do_interrupt method
Andreas Färber
1
-0
/
+2
2013-03-03
cpu: Introduce ENV_OFFSET macros
Andreas Färber
1
-0
/
+2
2013-02-16
target-arm: Update ARMCPU to QOM realizefn
Andreas Färber
1
-1
/
+2
2012-12-19
qom: move include files to include/qom/
Paolo Bonzini
1
-1
/
+1
2012-06-20
target-arm: Convert cp15 crn=1 registers
Peter Maydell
1
-0
/
+1
2012-06-20
target-arm: Add register_cp_regs_for_features()
Peter Maydell
1
-0
/
+1
2012-06-20
target-arm: initial coprocessor register framework
Peter Maydell
1
-0
/
+3
2012-04-27
target-arm: Move A9 config_base_address reset value to ARMCPU
Peter Maydell
1
-0
/
+1
2012-04-27
target-arm: Change cpu_arm_init() return type to ARMCPU
Andreas Färber
1
-1
/
+0
2012-04-21
target-arm: Move cache ID register setup to cpu specific init fns
Peter Maydell
1
-0
/
+5
2012-04-21
target-arm: Move feature register setup to per-CPU init fns
Peter Maydell
1
-0
/
+14
2012-04-21
target-arm: Move SCTLR reset value setup to per cpu init fns
Peter Maydell
1
-0
/
+1
2012-04-21
target-arm: Move CTR setup to per cpu init fns
Peter Maydell
1
-0
/
+1
2012-04-21
target-arm: Move MVFR* setup to per cpu init fns
Peter Maydell
1
-0
/
+2
2012-04-21
target-arm: Move FPSID config to cpu init fns
Peter Maydell
1
-0
/
+1
2012-04-21
target-arm: Move feature bit settings to CPU init fns
Peter Maydell
1
-0
/
+1
2012-04-21
target-arm: Add QOM subclasses for each ARM cpu implementation
Peter Maydell
1
-0
/
+12
2012-03-29
target-arm: Minimalistic CPU QOM'ification
Andreas Färber
1
-0
/
+71