aboutsummaryrefslogtreecommitdiff
path: root/target-alpha
AgeCommit message (Expand)AuthorFilesLines
2015-11-06target-alpha: fix uninitialized variablePaolo Bonzini1-1/+1
2015-10-28target-*: Advance pc after recognizing a breakpointRichard Henderson1-0/+5
2015-10-22disas: QOMify alpha specific disas setupPeter Crosthwaite1-0/+8
2015-10-09qdev: Protect device-list-properties against broken devicesMarkus Armbruster1-0/+7
2015-10-08s/cpu_get_real_ticks/cpu_get_host_ticks/Christopher Covington1-1/+1
2015-10-07tcg: Remove gen_intermediate_code_pcRichard Henderson1-37/+4
2015-10-07tcg: Pass data argument to restore_state_to_opcRichard Henderson1-2/+3
2015-10-07tcg: Add TCG_MAX_INSNSRichard Henderson1-0/+3
2015-10-07target-*: Drop cpu_gen_code defineRichard Henderson1-1/+0
2015-10-07target-*: Introduce and use cpu_breakpoint_testRichard Henderson1-9/+4
2015-10-07target-*: Increment num_insns immediately after tcg_gen_insn_startRichard Henderson1-2/+2
2015-10-07target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson1-4/+2
2015-10-07tcg: Rename debug_insn_start to insn_startRichard Henderson1-1/+1
2015-09-25alpha: Remove ELF_MACHINE from cpu.hPeter Crosthwaite1-2/+0
2015-09-11tlb: Add "ifetch" argument to cpu_mmu_index()Benjamin Herrenschmidt2-2/+2
2015-09-11typofixes - v4Veres Lajos1-1/+1
2015-09-03Merge remote-tracking branch 'remotes/rth/tags/pull-axp-20150902' into stagingPeter Maydell3-13/+46
2015-08-24tcg: Remove tcg_gen_trunc_i64_i32Richard Henderson1-2/+2
2015-08-18target-alpha: Inline hw_retRichard Henderson3-15/+10
2015-08-18target-alpha: Inline call_palRichard Henderson3-18/+24
2015-08-18target-alpha: Use separate TCGv temporaries for the shadow registersRichard Henderson6-103/+134
2015-08-18target-alpha: Special case cmpbge with zeroRichard Henderson3-1/+21
2015-08-17target-alpha: Rewrite helper_cmpbge using bit testsRichard Henderson1-13/+26
2015-07-09cpu-exec: Purge all uses of ENV_GET_CPU()Peter Crosthwaite1-1/+1
2015-07-09cpu: Change cpu_exec_init() arg to cpu, not envPeter Crosthwaite1-1/+1
2015-07-09translate-all: Change tb_flush() env argument to cpuPeter Crosthwaite1-1/+1
2015-07-09cpu: Add Error argument to cpu_exec_init()Bharata B Rao1-1/+1
2015-06-22disas: Remove uses of CPU envPeter Crosthwaite1-1/+1
2015-05-22Revert "target-alpha: Add vector implementation for CMPBGE"Peter Maydell1-37/+0
2015-05-21target-alpha: Add vector implementation for CMPBGERichard Henderson1-0/+37
2015-05-21target-alpha: Rewrite helper_zapnotRichard Henderson1-18/+12
2015-05-18target-alpha: Raise IOV from CVTQLRichard Henderson3-32/+13
2015-05-18target-alpha: Suppress underflow from CVTTQ if DNZRichard Henderson1-1/+1
2015-05-18target-alpha: Raise EXC_M_INV properly for fp inputsRichard Henderson3-10/+30
2015-05-18target-alpha: Disallow literal operand to 1C.30 to 1C.37Richard Henderson1-2/+17
2015-05-18target-alpha: Implement WH64ENRichard Henderson1-0/+4
2015-05-18target-alpha: Fix integer overflow checking insnsRichard Henderson3-70/+56
2015-05-18target-alpha: Fix cvttq vs infRichard Henderson1-1/+1
2015-05-18target-alpha: Fix cvttq vs large integersRichard Henderson1-5/+5
2015-05-18target-alpha: Raise IOV from CVTTQRichard Henderson3-30/+13
2015-05-18target-alpha: Set EXC_M_SWC for exceptions from /S insnsRichard Henderson1-5/+3
2015-05-18target-alpha: Set fpcr_exc_status even for disabled exceptionsRichard Henderson2-29/+34
2015-05-18target-alpha: Tidy FPCR representationRichard Henderson5-243/+159
2015-05-18target-alpha: Set PC correctly for floating-point exceptionsRichard Henderson2-1/+10
2015-05-18target-alpha: Forget installed round mode after MT_FPCRRichard Henderson1-0/+5
2015-05-18target-alpha: Rename floating-point subroutinesRichard Henderson3-36/+36
2015-05-18target-alpha: Move VAX helpers to a new fileRichard Henderson3-329/+354
2015-03-13tcg: Change translator-side labels to a pointerRichard Henderson1-2/+2
2015-03-10cpu: Make cpu_init() return QOM CPUState objectEduardo Habkost1-8/+1
2015-02-12tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson1-7/+7
generated by cgit v1.1 at 2024-11-03 05:36:53 +0000