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2019-09-17riscv: sifive_u: Update UART base addresses and IRQsBin Meng1-2/+2
2019-09-17riscv: sifive_u: Reference PRCI clocks in UART and ethernet nodesBin Meng1-0/+10
2019-09-17riscv: sifive_u: Add PRCI block to the SoCBin Meng1-0/+3
2019-09-17riscv: sifive_u: Generate hfclk and rtcclk nodesBin Meng1-0/+2
2019-09-17riscv: sifive: Implement PRCI model for FU540Bin Meng1-0/+81
2019-09-17riscv: sifive_u: Update hart configuration to reflect the real FU540 SoCBin Meng1-1/+5
2019-09-17riscv: sifive_u: Set the minimum number of cpus to 2Bin Meng1-0/+2
2019-09-17riscv: hart: Add a "hartid-base" property to RISC-V hart arrayBin Meng1-0/+1
2019-09-17riscv: Add a sifive_cpu.h to include both E and U cpu type definesBin Meng3-12/+33
2019-09-17riscv: sifive_e: prci: Update the PRCI register block sizeBin Meng1-0/+2
2019-09-17riscv: sifive: Rename sifive_prci.{c, h} to sifive_e_prci.{c, h}Bin Meng2-71/+69
2019-09-17riscv: sifive_test: Add reset functionalityBin Meng1-1/+2
2019-09-17riscv: Add a helper routine for finding firmwareBin Meng1-0/+1
2019-09-17riscv: plic: Remove unused interrupt functionsAlistair Francis1-3/+0
2019-09-17Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell6-25/+43
2019-09-16hw/i386/pc: Extract e820 memory layout codePhilippe Mathieu-Daudé1-11/+0
2019-09-16qemu-thread: Add qemu_cond_timedwaitYury Kotov1-0/+19
2019-09-16block: Remove unused masksNir Soffer1-2/+0
2019-09-16memory: inline and optimize devend_memopPaolo Bonzini1-1/+18
2019-09-16memory: fetch pmem size in get_file_size()Stefan Hajnoczi1-13/+0
2019-09-16elf-ops.h: fix int overflow in load_elf()Stefano Garzarella2-0/+6
2019-09-13aspeed/scu: Introduce a aspeed_scu_get_apb_freq() routineCédric Le Goater1-5/+3
2019-09-13aspeed/scu: Introduce per-SoC SCU typesCédric Le Goater1-0/+15
2019-09-13aspeed/smc: Inject errors in DMA checksumCédric Le Goater1-0/+1
2019-09-13aspeed/smc: Add support for DMAsCédric Le Goater1-0/+6
2019-09-13aspeed: Use consistent typenamesCédric Le Goater1-3/+0
2019-09-13aspeed: add a GPIO controller to the SoCRashmica Gupta1-0/+3
2019-09-13hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500Rashmica Gupta1-0/+100
2019-09-13Merge remote-tracking branch 'remotes/dgilbert/tags/pull-migration-20190912a'...Peter Maydell1-2/+1
2019-09-13Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into stagingPeter Maydell2-32/+0
2019-09-12migration: register_savevm_live doesn't need devDr. David Alan Gilbert1-2/+1
2019-09-11linux-user: add memfd_createShu-Chun Weng1-0/+4
2019-09-10job: drop job_drainVladimir Sementsov-Ogievskiy2-32/+0
2019-09-09Merge remote-tracking branch 'remotes/huth-gitlab/tags/m68k-pull-2019-09-07' ...Peter Maydell2-0/+48
2019-09-07escc: introduce a selector for the register bitLaurent Vivier1-0/+1
2019-09-07m68k: Add NeXTcube machineThomas Huth1-0/+38
2019-09-07m68k: Add NeXTcube keyboard deviceThomas Huth1-0/+2
2019-09-07m68k: Add NeXTcube framebuffer device emulationThomas Huth1-0/+7
2019-09-05nbd: Prepare for NBD_CMD_FLAG_FAST_ZEROEric Blake1-0/+4
2019-09-05nbd: Improve per-export flag handling in serverEric Blake1-1/+1
2019-09-05nbd: Advertise multi-conn for shared read-only connectionsEric Blake1-1/+1
2019-09-04Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell2-2/+2
2019-09-04Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190903' into stagingPeter Maydell6-10/+193
2019-09-04Merge remote-tracking branch 'remotes/juanquintela/tags/fail-pull-request' in...Peter Maydell3-1/+7
2019-09-04Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request...Peter Maydell4-8/+16
2019-09-04Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190903'...Peter Maydell3-13/+1
2019-09-04virtio-rng: change default backend to rng-builtinLaurent Vivier1-0/+2
2019-09-04virtio-rng: Keep the default backend out of VirtIORNGConfMarkus Armbruster1-2/+0
2019-09-03socket: Add num connections to qio_net_listener_open_sync()Juan Quintela1-0/+2
2019-09-03socket: Add num connections to qio_channel_socket_async()Juan Quintela1-0/+2