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2019-10-04target/i386: expand feature words to 64 bitsPaolo Bonzini1-1/+1
2019-10-04memory: allow memory_region_register_iommu_notifier() to failEric Auger1-5/+16
2019-10-04vfio: Turn the container error into an Error handleEric Auger1-1/+1
2019-09-30kvm: split too big memory section on several memslotsIgor Mammedov1-0/+1
2019-09-27Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190925' into stagingPeter Maydell6-82/+43
2019-09-26Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell1-1/+13
2019-09-26Merge remote-tracking branch 'remotes/dgilbert/tags/pull-migration-20190925a'...Peter Maydell1-6/+0
2019-09-26Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2019-09-24-v2' into...Peter Maydell1-0/+1
2019-09-25cputlb: Remove cpu->mem_io_vaddrRichard Henderson1-2/+0
2019-09-25cputlb: Merge and move memory_notdirty_write_{prepare,complete}Richard Henderson1-65/+0
2019-09-25cputlb: Partially inline memory_region_section_get_iotlbRichard Henderson1-5/+1
2019-09-25cputlb: Move NOTDIRTY handling from I/O path to TLB pathRichard Henderson1-2/+0
2019-09-25cputlb: Move ROM handling from I/O path to TLB pathRichard Henderson2-2/+4
2019-09-25cputlb: Introduce TLB_BSWAPRichard Henderson1-1/+3
2019-09-25qemu/compiler.h: Add qemu_build_not_reachedRichard Henderson1-0/+15
2019-09-25cputlb: Disable __always_inline__ without optimizationRichard Henderson1-0/+11
2019-09-25exec: Use TARGET_PAGE_BITS_MIN for TLB flagsRichard Henderson1-6/+10
2019-09-25migration/postcopy: unsentmap is not necessary for postcopyWei Yang1-6/+0
2019-09-25memory: Provide an equality function for MemoryRegionSectionsDr. David Alan Gilbert1-0/+12
2019-09-25memory: Align MemoryRegionSections fieldsDr. David Alan Gilbert1-1/+1
2019-09-25Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2019-09-24' into ...Peter Maydell1-4/+4
2019-09-24nbd: Grab aio context lock in more placesEric Blake1-0/+1
2019-09-24xen: perform XenDevice clean-up in XenBus watch handlerPaul Durrant1-0/+3
2019-09-24xen: introduce separate XenWatchList for XenDevice objectsPaul Durrant1-0/+2
2019-09-24xen / notify: introduce a new XenWatchList abstractionPaul Durrant2-1/+4
2019-09-24qapi: Make visit_next_list()'s comment less confusingMarkus Armbruster1-4/+4
2019-09-23Merge remote-tracking branch 'remotes/cminyard/tags/ipmi-for-release-2019-09-...Peter Maydell8-2/+184
2019-09-20pc: Add an SMB0 ACPI device to q35Corey Minyard1-0/+2
2019-09-20ipmi: Fix SSIF ACPI handling to use the right CRSCorey Minyard1-1/+1
2019-09-20acpi: Add i2c serial bus CRS handlingCorey Minyard1-0/+18
2019-09-20ipmi: Add PCI IPMI interfacesCorey Minyard1-0/+1
2019-09-20ipmi: Allow a size value to be passed for I/O spaceCorey Minyard3-1/+8
2019-09-20ipmi: Split out BT-specific code from ISA BT codeCorey Minyard1-0/+72
2019-09-20ipmi: Split out KCS-specific code from ISA KCS codeCorey Minyard1-0/+75
2019-09-20qdev: Add a no default uuid propertyCorey Minyard1-0/+7
2019-09-20Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-reques...Peter Maydell3-2/+3
2019-09-19Merge remote-tracking branch 'remotes/kraxel/tags/ui-20190919-pull-request' i...Peter Maydell1-1/+1
2019-09-19kvm: Fix typo in header of kvm_device_access()Greg Kurz1-1/+1
2019-09-19Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.2-sf1-v3...Peter Maydell11-92/+298
2019-09-19cutils: Move size_to_str() from "qemu-common.h" to "qemu/cutils.h"Philippe Mathieu-Daudé2-1/+2
2019-09-17riscv: sifive_u: Remove handcrafted clock nodes for UART and ethernetBin Meng1-2/+1
2019-09-17riscv: sifive_u: Fix broken GEM supportBin Meng1-1/+2
2019-09-17riscv: sifive_u: Instantiate OTP memory with a serial numberBin Meng1-0/+3
2019-09-17riscv: sifive: Implement a model for SiFive FU540 OTPBin Meng1-0/+80
2019-09-17riscv: sifive_u: Update UART base addresses and IRQsBin Meng1-2/+2
2019-09-17riscv: sifive_u: Reference PRCI clocks in UART and ethernet nodesBin Meng1-0/+10
2019-09-17riscv: sifive_u: Add PRCI block to the SoCBin Meng1-0/+3
2019-09-17riscv: sifive_u: Generate hfclk and rtcclk nodesBin Meng1-0/+2
2019-09-17riscv: sifive: Implement PRCI model for FU540Bin Meng1-0/+81
2019-09-17riscv: sifive_u: Update hart configuration to reflect the real FU540 SoCBin Meng1-1/+5