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AgeCommit message (Expand)AuthorFilesLines
2021-10-13tcg: Move helper_*_mmu decls to tcg/tcg-ldst.hRichard Henderson2-71/+74
2021-10-13accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.hRichard Henderson1-87/+0
2021-10-12accel/tcg: re-factor plugin_inject_cb so we can assert insn_idx is validAlex Bennée1-6/+0
2021-10-05tcg: Split out MemOpIdx to exec/memopidx.hRichard Henderson1-38/+1
2021-10-05tcg: Rename TCGMemOpIdx to MemOpIdxRichard Henderson1-37/+37
2021-10-05tcg: add dup_const_tl wrapperPhilipp Tomsich1-0/+12
2021-09-14tcg: Remove tcg_global_reg_new definesBin Meng1-2/+0
2021-07-21tcg: Rename helper_atomic_*_mmu and provide for user-onlyRichard Henderson1-44/+36
2021-07-09tcg: Remove TCG_TARGET_HAS_goto_ptrRichard Henderson1-2/+1
2021-07-09tcg: Move tb_phys_invalidate_count to tb_ctxRichard Henderson1-3/+0
2021-07-09tcg: Bake tb_destroy() into tcg_region_treeLiren Wei1-1/+0
2021-06-29tcg: Add flags argument to tcg_gen_bswap16_*, tcg_gen_bswap32_i64Richard Henderson1-4/+4
2021-06-29tcg: Add flags argument to bswap opcodesRichard Henderson2-5/+17
2021-06-29tcg: Implement tcg_gen_vec_add{sub}32_tlLIU Zhiwei1-0/+4
2021-06-29tcg: Add tcg_gen_vec_shl{shr}{sar}8i_i32LIU Zhiwei1-0/+10
2021-06-29tcg: Add tcg_gen_vec_shl{shr}{sar}16i_i32LIU Zhiwei1-0/+10
2021-06-29tcg: Add tcg_gen_vec_add{sub}8_i32LIU Zhiwei1-0/+6
2021-06-29tcg: Add tcg_gen_vec_add{sub}16_i32LIU Zhiwei1-0/+13
2021-06-24Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210624'...Peter Maydell2-1/+8
2021-06-21tcg: Make gen_dup_i32/i64() public as tcg_gen_dup_i32/i64Peter Maydell2-1/+8
2021-06-19tcg: expose TCGCond manipulation routinesAlessandro Di Federico2-69/+102
2021-06-19tcg/tci: Change encoding to uint32_t unitsRichard Henderson1-2/+2
2021-06-19tcg/tci: Use ffi for callsRichard Henderson1-0/+1
2021-06-13tcg: Fix documentation for tcg_constant_* vs tcg_temp_free_*Richard Henderson1-1/+2
2021-06-13tcg: Introduce tcg_remove_ops_afterRichard Henderson1-0/+10
2021-06-13tcg: Move tcg_init_ctx and tcg_ctx from accel/tcg/Richard Henderson1-1/+0
2021-06-11tcg: Move in_code_gen_buffer and tests to region.cRichard Henderson1-10/+1
2021-06-11accel/tcg: Pass down max_cpus to tcg_initRichard Henderson1-1/+1
2021-06-11tcg: Create tcg_initRichard Henderson1-2/+1
2021-06-11accel/tcg: Move alloc_code_gen_buffer to tcg/region.cRichard Henderson1-1/+1
2021-05-26accel/tcg: Reduce 'exec/tb-context.h' inclusionPhilippe Mathieu-Daudé1-1/+0
2021-05-14tcg: Add tcg_constant_tlMatheus Ferst1-0/+2
2021-03-17tcg/tci: Implement the disassembler properlyRichard Henderson1-2/+0
2021-01-24tcg: Restart code generation when we run out of tempsRichard Henderson1-0/+3
2021-01-22tcg: Optimize inline dup_const for MO_64Richard Henderson1-1/+2
2021-01-13tcg: Remove tcg_gen_dup{8,16,32,64}i_vecRichard Henderson1-4/+0
2021-01-13tcg: Remove movi and dupi opcodesRichard Henderson1-3/+0
2021-01-13tcg/tci: Add special tci_movi_{i32,i64} opcodesRichard Henderson1-0/+8
2021-01-13tcg: Use tcg_constant_{i32,i64,vec} with gvec expandersRichard Henderson1-0/+1
2021-01-13tcg: Use tcg_constant_{i32,i64} with tcg int expandersRichard Henderson1-11/+2
2021-01-13tcg: Introduce TYPE_CONST temporariesRichard Henderson1-1/+23
2021-01-13tcg: Expand TCGTemp.val to 64-bitsRichard Henderson1-1/+1
2021-01-13tcg: Add temp_readonlyRichard Henderson1-0/+5
2021-01-13tcg: Consolidate 3 bits into enum TCGTempKindRichard Henderson1-8/+12
2021-01-07tcg: Constify tcg_code_gen_epilogueRichard Henderson1-1/+1
2021-01-07tcg: Introduce tcg_tbrel_diffRichard Henderson1-0/+13
2021-01-07tcg: Make DisasContextBase.tb constRichard Henderson1-1/+1
2021-01-07tcg: Adjust tcg_register_jit for constRichard Henderson1-1/+1
2021-01-07tcg: Adjust TCGLabel for constRichard Henderson1-1/+1
2021-01-07tcg: Introduce tcg_splitwx_to_{rx,rw}Richard Henderson1-5/+21
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