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2022-05-30hw/hyperv/vmbus: Remove unused vmbus_load/save_req()Philippe Mathieu-Daudé1-3/+0
2022-05-26pseries: allow setting stdout-path even on machines with a VGAPaolo Bonzini1-1/+1
2022-05-25hw/gpio: replace HWADDR_PRIx with PRIx64Jamin Lin1-1/+1
2022-05-25hw/gpio support GPIO index mode for write operation.Jamin Lin1-0/+14
2022-05-25hw: aspeed: Introduce common UART init functionPeter Delevoryas1-0/+1
2022-05-25hw: aspeed: Add uarts_num SoC attributePeter Delevoryas1-0/+1
2022-05-25hw: aspeed: Add missing UART'sPeter Delevoryas1-0/+8
2022-05-25aspeed: Introduce a get_irq AspeedSoCClass methodCédric Le Goater1-0/+3
2022-05-19ptimer: Rename PTIMER_POLICY_DEFAULT to PTIMER_POLICY_LEGACYPeter Maydell1-4/+12
2022-05-19hw/adc/zynq-xadc: Use qemu_irq typedefPhilippe Mathieu-Daudé1-2/+1
2022-05-19hw/intc/arm_gicv3: Use correct number of priority bits for the CPUPeter Maydell1-0/+1
2022-05-19hw/intc/arm_gicv3: Support configurable number of physical priority bitsPeter Maydell1-5/+2
2022-05-16Merge tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu in...Richard Henderson22-25/+1227
2022-05-16hw/i386: Make pic a property of common x86 base machine typeXiaoyao Li2-2/+2
2022-05-16hw/i386: Make pit a property of common x86 base machine typeXiaoyao Li3-4/+2
2022-05-16include/hw/pci/pcie_host: Correct PCIE_MMCFG_SIZE_MAXFrancisco Iglesias1-1/+1
2022-05-16include/hw/pci/pcie_host: Correct PCIE_MMCFG_BUS_MASKFrancisco Iglesias1-2/+2
2022-05-16virtio: add vhost support for virtio devicesJonah Palmer1-0/+3
2022-05-16virtio: drop name parameter for virtio_init()Jonah Palmer3-5/+4
2022-05-16virtio/vhost-user: dynamically assign VhostUserHostNotifiersAlex Bennée1-1/+41
2022-05-16hw/virtio/vhost-user: don't suppress F_CONFIG when supportedAlex Bennée1-0/+1
2022-05-16include/hw: start documenting the vhost APIAlex Bennée1-10/+122
2022-05-16hw/virtio: move virtio-pci.h into shared include spaceAlex Bennée1-0/+255
2022-05-16intel_iommu: Support IR-only mode without DMA translationDavid Woodhouse1-0/+1
2022-05-14introduce -audio as a replacement for -soundhwPaolo Bonzini1-2/+2
2022-05-14soundhw: extract soundhw help to a separate functionPaolo Bonzini1-0/+1
2022-05-14qdev-properties: Add a new macro with bitmask check for uint64_t propertyYang Weijiang1-0/+12
2022-05-13cxl/cxl-host: Add memops for CFMWS region.Jonathan Cameron1-0/+2
2022-05-13mem/cxl_type3: Add read and write functions for associated hostmem.Jonathan Cameron1-0/+6
2022-05-13CXL/cxl_component: Add cxl_get_hb_cstate()Jonathan Cameron1-0/+2
2022-05-13pci/pcie_port: Add pci_find_port_by_pn()Jonathan Cameron1-0/+2
2022-05-13hw/cxl/host: Add support for CXL Fixed Memory Windows.Jonathan Cameron1-0/+21
2022-05-13hw/cxl/component: Add utils for interleave parameter encoding/decodingJonathan Cameron1-0/+8
2022-05-13acpi/cxl: Create the CEDT (9.14.1)Ben Widawsky2-0/+25
2022-05-13acpi/cxl: Add _OSC implementation (9.14.2)Ben Widawsky1-0/+23
2022-05-13hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142)Ben Widawsky1-0/+14
2022-05-13hw/cxl/device: Implement get/set Label Storage Area (LSA)Ben Widawsky1-0/+5
2022-05-13hw/cxl/device: Plumb real Label Storage Area (LSA) sizingBen Widawsky1-1/+10
2022-05-13hw/cxl/device: Add a memory device (8.2.8.5)Ben Widawsky3-0/+37
2022-05-13hw/pxb: Allow creation of a CXL PXB (host bridge)Ben Widawsky1-0/+6
2022-05-13cxl: Machine level control on whether CXL support is enabledJonathan Cameron2-0/+6
2022-05-13hw/pci/cxl: Create a CXL bus typeBen Widawsky1-0/+7
2022-05-13hw/cxl/device: Timestamp implementation (8.2.9.3)Ben Widawsky1-0/+6
2022-05-13hw/cxl/device: Add memory device utilitiesBen Widawsky1-3/+18
2022-05-13hw/cxl/device: Implement basic mailbox (8.2.8.4)Ben Widawsky2-1/+21
2022-05-13hw/cxl/device: Implement the CAP array (8.2.8.1-2)Ben Widawsky1-1/+30
2022-05-13hw/cxl/device: Introduce a CXL device (8.2.8)Ben Widawsky2-0/+167
2022-05-13hw/cxl/component: Introduce CXL components (8.1.x, 8.2.5)Ben Widawsky3-0/+375
2022-05-13hw/pci/cxl: Add a CXL component type (interface)Ben Widawsky1-0/+8
2022-05-12machine: make memory-backend a link propertyPaolo Bonzini1-2/+2
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