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AgeCommit message (Expand)AuthorFilesLines
2022-02-26aspeed/smc: Add an address mask on segment registersCédric Le Goater1-0/+1
2022-01-28hw/ssi: Add a model of Xilinx Versal's OSPI flash memory controllerFrancisco Iglesias1-0/+111
2021-10-22aspeed/smc: Use a container for the flash mmio address spaceCédric Le Goater1-1/+1
2021-10-12aspeed/smc: Remove unused attribute 'irqline'Cédric Le Goater1-1/+0
2021-10-12aspeed/smc: Introduce a new addr_width() class handlerCédric Le Goater1-0/+1
2021-10-12aspeed/smc: Add default reset valuesCédric Le Goater1-0/+1
2021-10-12aspeed/smc: QOMify AspeedSMCFlashCédric Le Goater1-4/+9
2021-10-12aspeed/smc: Rename AspeedSMCFlash 'id' to 'cs'Cédric Le Goater1-1/+1
2021-10-12aspeed/smc: Remove the 'size' attribute from AspeedSMCFlashCédric Le Goater1-1/+0
2021-10-12aspeed/smc: Remove the 'flash' attribute from AspeedSMCFlashCédric Le Goater1-1/+0
2021-10-12aspeed/smc: Drop AspeedSMCController structureCédric Le Goater1-35/+29
2021-05-01aspeed/smc: Add extra controls to request DMACédric Le Goater1-0/+1
2021-05-01aspeed/smc: Add a 'features' attribute to the object classCédric Le Goater1-1/+1
2021-05-01hw/arm/aspeed: Do not sysbus-map mmio flash region directly, use aliasPhilippe Mathieu-Daudé1-0/+1
2021-05-01aspeed/smc: Remove unused "sdram-base" propertyCédric Le Goater1-3/+0
2021-03-10hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spipsXuzhou Cheng1-1/+1
2021-03-04hw/ssi: Add SiFive SPI controller supportBin Meng1-0/+47
2021-02-11arm: Update infocenter.arm.com URLsPeter Maydell1-2/+3
2021-02-02hw/ssi: imx_spi: Use a macro for number of chip selects supportedBin Meng1-1/+4
2020-12-10hw/core/stream: Rename StreamSlave as StreamSinkPhilippe Mathieu-Daudé1-1/+1
2020-12-10hw/ssi: Rename SSI 'slave' as 'peripheral'Philippe Mathieu-Daudé1-23/+23
2020-12-10hw/ssi: Update coding style to make checkpatch.pl happyPhilippe Mathieu-Daudé1-7/+9
2020-12-10hw/ssi/aspeed_smc: Rename 'max_slaves' variable as 'max_peripherals'Philippe Mathieu-Daudé1-1/+1
2020-09-18Use OBJECT_DECLARE_SIMPLE_TYPE when possibleEduardo Habkost5-17/+6
2020-09-18Use OBJECT_DECLARE_TYPE when possibleEduardo Habkost2-7/+2
2020-09-18qom: Remove module_obj_name parameter from OBJECT_DECLARE* macrosEduardo Habkost1-1/+1
2020-09-14hw/ssi: NPCM7xx Flash Interface Unit device modelHavard Skinnemoen1-0/+73
2020-09-09Use OBJECT_DECLARE_TYPE where possibleEduardo Habkost1-4/+2
2020-09-09Use DECLARE_*CHECKER* macrosEduardo Habkost7-28/+20
2020-09-09Move QOM typedefs and add missing includesEduardo Habkost7-18/+34
2020-07-03Replace uses of FROM_SSI_SLAVE() macro with QOM castsPeter Maydell1-2/+0
2020-07-03hw/misc/max111x: Use GPIO lines rather than max111x_set_input()Peter Maydell1-3/+0
2020-07-03ssi: Add ssi_realize_and_unref()Peter Maydell1-0/+26
2020-06-15ssi: ssi_create_slave_no_init() is now unused, dropMarkus Armbruster1-1/+0
2020-06-15ssi: ssi_auto_connect_slaves() never does anything, dropMarkus Armbruster1-4/+0
2019-12-16aspeed/smc: Add AST2600 timings registersCédric Le Goater1-0/+1
2019-10-15aspeed/smc: Introduce segment operationsCédric Le Goater1-0/+4
2019-09-13aspeed/smc: Inject errors in DMA checksumCédric Le Goater1-0/+1
2019-09-13aspeed/smc: Add support for DMAsCédric Le Goater1-0/+6
2019-08-16Include hw/qdev-properties.h lessMarkus Armbruster1-1/+1
2019-08-16Include hw/hw.h exactly where neededMarkus Armbruster1-1/+0
2019-08-16include: Make headers more self-containedMarkus Armbruster2-0/+2
2019-07-01aspeed/smc: add a 'sdram_base' propertyCédric Le Goater1-0/+3
2019-01-29aspeed/smc: snoop SPI transfers to fake dummy cyclesCédric Le Goater1-0/+3
2018-08-24hw/ssi/pl022: Allow use as embedded-struct devicePeter Maydell1-0/+51
2018-06-26xilinx_spips: Make dma transactions as per dma_burst_sizeSai Pavan Boddu1-1/+4
2017-12-13xilinx_spips: Set all of the reset valuesAlistair Francis1-1/+1
2017-12-13xilinx_spips: Add support for the ZynqMP Generic QSPIFrancisco Iglesias1-1/+31
2017-12-13xilinx_spips: Add support for zero pumpingFrancisco Iglesias1-0/+2
2017-12-13xilinx_spips: Add support for RX discard and RX drainFrancisco Iglesias1-0/+6
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