Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2022-01-21 | hw/riscv: spike: Allow using binary firmware as bios | Anup Patel | 1 | -0/+1 |
2020-12-17 | riscv: spike: Remove target macro conditionals | Alistair Francis | 1 | -6/+0 |
2020-09-09 | Use DECLARE_*CHECKER* macros | Eduardo Habkost | 1 | -2/+2 |
2020-09-09 | Move QOM typedefs and add missing includes | Eduardo Habkost | 1 | -2/+4 |
2020-08-25 | hw/riscv: spike: Allow creating multiple NUMA sockets | Anup Patel | 1 | -2/+9 |
2020-06-03 | hw/riscv: spike: Remove deprecated ISA specific machines | Alistair Francis | 1 | -4/+2 |
2019-10-28 | riscv: hw: Drop "clock-frequency" property of cpu nodes | Bin Meng | 1 | -4/+0 |
2019-08-16 | include: Make headers more self-contained | Markus Armbruster | 1 | -0/+3 |
2018-05-06 | RISC-V: Make some header guards more specific | Michael Clark | 1 | -2/+2 |
2018-05-06 | RISC-V: Remove unused class definitions | Michael Clark | 1 | -7/+0 |
2018-05-06 | RISC-V: Replace hardcoded constants with enum values | Michael Clark | 1 | -0/+4 |
2018-03-07 | RISC-V Spike Machines | Michael Clark | 1 | -0/+53 |