riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-01-16	riscv: Pass RISCVHartArrayState by pointer	Alistair Francis	1	-3/+3
2020-12-17	hw/riscv: Use the CPU to determine if 32-bit	Alistair Francis	1	-3/+5
2020-12-17	hw/riscv: boot: Remove compile time XLEN checks	Alistair Francis	1	-3/+5
2020-10-22	hw/riscv: Load the kernel after the firmware	Alistair Francis	1	-0/+3
2020-10-22	hw/riscv: Add a riscv_is_32_bit() function	Alistair Francis	1	-0/+2
2020-10-22	hw/riscv: Return the end address of the loaded firmware	Alistair Francis	1	-4/+4
2020-07-13	riscv: Add opensbi firmware dynamic support	Atish Patra	1	-1/+4
2020-07-13	RISC-V: Copy the fdt in dram instead of ROM	Atish Patra	1	-1/+3
2020-07-13	riscv: Unify Qemu's reset vector code path	Atish Patra	1	-0/+2
2020-06-03	riscv/boot: Add a missing header include	Alistair Francis	1	-0/+1
2020-04-29	hw/riscv: Add optional symbol callback ptr to riscv_load_firmware()	Anup Patel	1	-2/+4
2019-11-25	hw/riscv: Add optional symbol callback ptr to riscv_load_kernel()	Zhuang, Siwei (Data61, Kensington NSW)	1	-1/+2
2019-09-17	riscv: Add a helper routine for finding firmware	Bin Meng	1	-0/+1
2019-08-16	include: Make headers more self-contained	Markus Armbruster	1	-0/+2
2019-07-18	hw/riscv: Load OpenSBI as the default firmware	Alistair Francis	1	-0/+3
2019-06-27	hw/riscv: Add support for loading a firmware	Alistair Francis	1	-0/+2
2019-06-27	hw/riscv: Split out the boot functions	Alistair Francis	1	-0/+27