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path: root/include/hw/riscv/boot.h
AgeCommit message (Expand)AuthorFilesLines
2023-02-16hw/riscv/boot.c: make riscv_load_initrd() staticDaniel Henrique Barboza1-1/+0
2023-02-16hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()Daniel Henrique Barboza1-0/+1
2023-02-16hw/riscv: handle 32 bit CPUs kernel_entry in riscv_load_kernel()Daniel Henrique Barboza1-0/+1
2023-02-07hw/riscv: change riscv_compute_fdt_addr() semanticsDaniel Henrique Barboza1-1/+1
2023-02-07hw/riscv: split fdt address calculation from fdt loadDaniel Henrique Barboza1-1/+3
2023-01-20hw/riscv/boot.c: use MachineState in riscv_load_kernel()Daniel Henrique Barboza1-1/+1
2023-01-20hw/riscv/boot.c: use MachineState in riscv_load_initrd()Daniel Henrique Barboza1-2/+1
2023-01-20hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd()Daniel Henrique Barboza1-2/+2
2023-01-20hw/riscv/boot.c: Introduce riscv_find_firmware()Bin Meng1-0/+2
2023-01-20hw/riscv/boot.c: introduce riscv_default_firmware_name()Daniel Henrique Barboza1-0/+1
2023-01-20hw/riscv/boot.c: make riscv_find_firmware() staticDaniel Henrique Barboza1-1/+0
2022-10-14hw/riscv: virt: Enable booting S-mode firmware from pflashSunil V L1-0/+1
2022-09-07hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec()Daniel Henrique Barboza1-1/+1
2022-04-22hw/riscv: boot: Support 64bit fdt address.Dylan Jhong1-2/+2
2022-01-21hw/riscv: Remove macros for ELF BIOS image namesAnup Patel1-2/+0
2022-01-21target/riscv: Support start kernel directly by KVMYifei Jiang1-0/+1
2021-10-28hw/riscv: boot: Add a PLIC config string functionAlistair Francis1-0/+2
2021-06-08hw/riscv: Use macros for BIOS image namesBin Meng1-0/+5
2021-01-16riscv: Pass RISCVHartArrayState by pointerAlistair Francis1-3/+3
2020-12-17hw/riscv: Use the CPU to determine if 32-bitAlistair Francis1-3/+5
2020-12-17hw/riscv: boot: Remove compile time XLEN checksAlistair Francis1-3/+5
2020-10-22hw/riscv: Load the kernel after the firmwareAlistair Francis1-0/+3
2020-10-22hw/riscv: Add a riscv_is_32_bit() functionAlistair Francis1-0/+2
2020-10-22hw/riscv: Return the end address of the loaded firmwareAlistair Francis1-4/+4
2020-07-13riscv: Add opensbi firmware dynamic supportAtish Patra1-1/+4
2020-07-13RISC-V: Copy the fdt in dram instead of ROMAtish Patra1-1/+3
2020-07-13riscv: Unify Qemu's reset vector code pathAtish Patra1-0/+2
2020-06-03riscv/boot: Add a missing header includeAlistair Francis1-0/+1
2020-04-29hw/riscv: Add optional symbol callback ptr to riscv_load_firmware()Anup Patel1-2/+4
2019-11-25hw/riscv: Add optional symbol callback ptr to riscv_load_kernel()Zhuang, Siwei (Data61, Kensington NSW)1-1/+2
2019-09-17riscv: Add a helper routine for finding firmwareBin Meng1-0/+1
2019-08-16include: Make headers more self-containedMarkus Armbruster1-0/+2
2019-07-18hw/riscv: Load OpenSBI as the default firmwareAlistair Francis1-0/+3
2019-06-27hw/riscv: Add support for loading a firmwareAlistair Francis1-0/+2
2019-06-27hw/riscv: Split out the boot functionsAlistair Francis1-0/+27