| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2022-08-31 | ppc/pnv: turn PnvPHB3 into a PnvPHB backend | Daniel Henrique Barboza | 1 | -1/+2 |
| 2022-08-31 | ppc/pnv: Add initial P9/10 SBE model | Nicholas Piggin | 1 | -0/+3 |
| 2022-07-06 | ppc/pnv: assign pnv-phb-root-port chassis/slot earlier | Daniel Henrique Barboza | 1 | -1/+2 |
| 2022-07-06 | ppc/pnv: attach phb3/phb4 root ports in QOM tree | Daniel Henrique Barboza | 1 | -1/+1 |
| 2022-03-14 | ppc/pnv: Remove user-created PHB{3,4,5} devices | Cédric Le Goater | 1 | -1/+0 |
| 2022-03-02 | ppc/pnv: Add a HOMER model to POWER10 | Cédric Le Goater | 1 | -0/+10 |
| 2022-03-02 | ppc/pnv: Add model for POWER10 PHB5 PCIe Host bridge | Cédric Le Goater | 1 | -0/+3 |
| 2022-03-02 | ppc/pnv: Add POWER10 quads | Cédric Le Goater | 1 | -0/+3 |
| 2022-03-02 | ppc/pnv: Add a OCC model for POWER10 | Cédric Le Goater | 1 | -0/+1 |
| 2022-03-02 | ppc/pnv: Add a XIVE2 controller to the POWER10 chip | Cédric Le Goater | 1 | -0/+22 |
| 2022-01-12 | ppc/pnv: Move num_phbs under Pnv8Chip | Cédric Le Goater | 1 | -2/+2 |
| 2022-01-12 | ppc/pnv: Reparent user created PHB3 devices to the PnvChip | Cédric Le Goater | 1 | -0/+1 |
| 2022-01-12 | ppc/pnv: Introduce support for user created PHB3 devices | Cédric Le Goater | 1 | -0/+2 |
| 2022-01-12 | ppc/pnv: Attach PHB3 root port device when defaults are enabled | Cédric Le Goater | 1 | -0/+1 |
| 2021-12-17 | ppc/pnv: Introduce a num_pecs class attribute for PHB4 PEC devices | Cédric Le Goater | 1 | -0/+2 |
| 2021-08-27 | ppc/pnv: Use a simple incrementing index for the chip-id | Cédric Le Goater | 1 | -26/+7 |
| 2021-08-27 | ppc/pnv: Change the POWER10 machine to support DD2 only | Cédric Le Goater | 1 | -1/+1 |
| 2021-02-10 | ppc/pnv: Introduce a LPC FW memory region attribute to map the PNOR | Cédric Le Goater | 1 | -0/+1 |
| 2020-11-15 | non-virt: Fix Lesser GPL version number | Chetan Pant | 1 | -1/+1 |
| 2020-09-18 | qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros | Eduardo Habkost | 1 | -1/+1 |
| 2020-09-09 | Use OBJECT_DECLARE_TYPE where possible | Eduardo Habkost | 1 | -4/+2 |
| 2020-09-09 | Use DECLARE_*CHECKER* macros | Eduardo Habkost | 1 | -24/+20 |
| 2020-09-09 | Move QOM typedefs and add missing includes | Eduardo Habkost | 1 | -13/+20 |
| 2020-04-07 | ppc/pnv: Create BMC devices only when defaults are enabled | Cédric Le Goater | 1 | -0/+2 |
| 2020-02-02 | ppc/pnv: Add models for POWER8 PHB3 PCIe Host bridge | Cédric Le Goater | 1 | -0/+4 |
| 2020-02-02 | ppc/pnv: Add models for POWER9 PHB4 PCIe Host bridge | Benjamin Herrenschmidt | 1 | -0/+7 |
| 2020-02-02 | ppc/pnv: Add support for "hostboot" mode | Cédric Le Goater | 1 | -0/+2 |
| 2020-01-08 | pnv/xive: Deduce the PnvXive pointer from XiveTCTX::xptr | Greg Kurz | 1 | -2/+0 |
| 2020-01-08 | ppc/pnv: Add a "pnor" const link property to the BMC internal simulator | Greg Kurz | 1 | -1/+1 |
| 2020-01-08 | ppc/pnv: Add an "nr-threads" property to the base chip class | Greg Kurz | 1 | -0/+1 |
| 2020-01-08 | ppc/pnv: Introduce a "xics" property under the POWER8 chip | Cédric Le Goater | 1 | -0/+2 |
| 2019-12-17 | ppc/pnv: Drop PnvChipClass::type | Greg Kurz | 1 | -9/+0 |
| 2019-12-17 | ppc/pnv: Introduce PnvChipClass::xscom_pcba() method | Greg Kurz | 1 | -0/+1 |
| 2019-12-17 | ppc/pnv: Drop pnv_chip_is_power9() and pnv_chip_is_power10() helpers | Greg Kurz | 1 | -10/+0 |
| 2019-12-17 | ppc/pnv: Introduce PnvChipClass::xscom_core_base() method | Greg Kurz | 1 | -0/+1 |
| 2019-12-17 | ppc/pnv: Introduce PnvChipClass::intc_print_info() method | Greg Kurz | 1 | -0/+1 |
| 2019-12-17 | ppc/pnv: Drop pnv_is_power9() and pnv_is_power10() helpers | Greg Kurz | 1 | -10/+0 |
| 2019-12-17 | ppc/pnv: Introduce PnvMachineClass::dt_power_mgt() | Greg Kurz | 1 | -2/+6 |
| 2019-12-17 | ppc/pnv: Introduce PnvMachineClass and PnvMachineClass::compat | Greg Kurz | 1 | -0/+13 |
| 2019-12-17 | ppc/pnv: Fix OCC common area region mapping | Cédric Le Goater | 1 | -0/+4 |
| 2019-12-17 | ppc/pnv: Introduce PBA registers | Cédric Le Goater | 1 | -10/+6 |
| 2019-12-17 | ppc/pnv: add a LPC Controller model for POWER10 | Cédric Le Goater | 1 | -0/+4 |
| 2019-12-17 | ppc/pnv: add a PSI bridge model for POWER10 | Cédric Le Goater | 1 | -0/+9 |
| 2019-12-17 | ppc/pnv: Introduce a POWER10 PnvChip and a powernv10 machine | Cédric Le Goater | 1 | -0/+33 |
| 2019-12-17 | ppc/pnv: Clarify how the TIMA is accessed on a multichip system | Cédric Le Goater | 1 | -0/+3 |
| 2019-12-17 | ppc/pnv: Fix TIMA indirect access | Cédric Le Goater | 1 | -0/+2 |
| 2019-12-17 | ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helper | Cédric Le Goater | 1 | -0/+5 |
| 2019-12-17 | ppc/pnv: Instantiate cores separately | Greg Kurz | 1 | -1/+1 |
| 2019-12-17 | ppc/pnv: Create BMC devices at machine init | Cédric Le Goater | 1 | -1/+1 |
| 2019-12-17 | ppc/pnv: Add HIOMAP commands | Cédric Le Goater | 1 | -0/+1 |
