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2024-01-30m68k: Clean up includesPeter Maydell1-1/+0
This commit was created with scripts/clean-includes: ./scripts/clean-includes --git m68k include/hw/audio/asc.h include/hw/m68k/*.h All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-01-11q800: move dp8393x_prom memory region to Q800MachineStateMark Cave-Ayland1-0/+1
There is no need to dynamically allocate the memory region from the heap. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20231227210212.245106-1-mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-01hw/char/mcf_uart: Have mcf_uart_create() return DeviceStatePhilippe Mathieu-Daudé1-2/+2
There is no point in having mcf_uart_init() demote the DeviceState pointer and return a void one. Directly return the real typedef. mcf_uart_init() do both init + realize: rename as mcf_uart_create(). Similarly, mcf_uart_mm_init() do init / realize / mmap: rename as mcf_uart_create_mmap(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231019104929.16517-1-philmd@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-10-06q800: add alias for MacOS toolbox ROM at 0x40000000Mark Cave-Ayland1-0/+1
According to the Apple Quadra 800 Developer Note document, the Quadra 800 ROM consists of 2 ROM code sections based at offsets 0x0 and 0x800000. A/UX attempts to access the toolbox ROM at the lower offset during startup, so provide a memory alias to allow the access to succeed. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20231004083806.757242-20-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-10-06q800: add ESCC alias at 0xc000Mark Cave-Ayland1-0/+1
Tests on real Q800 hardware show that the ESCC is addressable at multiple locations within the ESCC memory region - at least 0xc000, 0xc020 (as expected by the MacOS toolbox ROM) and 0xc040. All released NetBSD kernels before 10 use the 0xc000 address which causes a fatal error when running the MacOS booter. Add a single memory region alias at 0xc000 to enable NetBSD kernels to start booting under QEMU. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20231004083806.757242-19-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-10-06q800: add easc bool machine class property to switch between ASC and EASCMark Cave-Ayland1-0/+1
This determines whether the Apple Sound Chip (ASC) is set to enhanced mode (default) or to original mode. The real Q800 hardware used an EASC chip however a lot of older software only works with the older ASC chip. Adding this as a machine parameter allows QEMU to be used as an developer aid for testing and migrating code from ASC to EASC. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20231004083806.757242-11-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-10-06q800: add Apple Sound Chip (ASC) audio to machineMark Cave-Ayland2-1/+5
The Quadra 800 has the enhanced ASC (EASC) audio chip which supports both the legacy IRQ routing through VIA2 and also "A/UX" mode routing direct to the CPU. Co-developed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20231004083806.757242-10-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-10-06q800: allow accesses to RAM area even if less memory is availableMark Cave-Ayland1-0/+1
MacOS attempts a series of writes and reads over the entire RAM area in order to determine the amount of RAM within the machine. Allow accesses to the entire RAM area ignoring writes and always reading zero for areas where there is no physical RAM installed to allow MacOS to detect the memory size without faulting. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20231004083806.757242-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-10-06q800: add IOSB subsystemMark Cave-Ayland1-0/+2
It is needed because it defines the BIOSConfig area. Co-developed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Message-ID: <20231004083806.757242-6-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-10-06q800: add machine id registerMark Cave-Ayland1-0/+1
MacOS reads this address to identify the hardware. This is a basic implementation returning the ID of Quadra 800. Details: http://mess.redump.net/mess/driver_info/mac_technical_notes "There are 3 ID schemes [...] The third and most scalable is a machine ID register at 0x5ffffffc. The top word must be 0xa55a to be valid. Then bits 15-11 are 0 for consumer Macs, 1 for portables, 2 for high-end 68k, and 3 for high-end PowerPC. Bit 10 is 1 if additional ID bits appear elsewhere (e.g. in VIA1). The rest of the bits are a per-model identifier. Model Lower 16 bits of ID ... Quadra/Centris 610/650/800 0x2BAD" Co-developed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231004083806.757242-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-10-06q800: add djMEMC memory controllerMark Cave-Ayland1-0/+2
The djMEMC controller is used to store information related to the physical memory configuration. Co-developed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231004083806.757242-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-06-22q800: move macfb device to Q800MachineStateMark Cave-Ayland1-0/+2
Also change the instantiation of the macfb device to use object_initialize_child(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-23-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-06-22q800: move mac-nubus-bridge device to Q800MachineStateMark Cave-Ayland1-0/+2
Also change the instantiation of the mac-nubus-bridge device to use object_initialize_child() and map the Nubus address space using memory_region_add_subregion() instead of sysbus_mmio_map(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230621085353.113233-21-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-06-22q800: move SWIM device to Q800MachineStateMark Cave-Ayland1-0/+2
Also change the instantiation of the SWIM device to use object_initialize_child(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-20-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-06-22q800: move ESP device to Q800MachineStateMark Cave-Ayland1-0/+2
Also change the instantiation of the ESP device to use object_initialize_child(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-19-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-06-22q800: move escc_orgate device to Q800MachineStateMark Cave-Ayland1-0/+2
Also change the instantiation of the escc_orgate device to use object_initialize_child(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-18-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-06-22q800: move ESCC device to Q800MachineStateMark Cave-Ayland1-0/+2
Also change the instantiation of the ESCC device to use object_initialize_child(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-17-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-06-22q800: move dp8393x device to Q800MachineStateMark Cave-Ayland1-0/+2
Also change the instantiation of the dp8393x device to use object_initialize_child(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> CC: Jason Wang <jasowang@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-16-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-06-22q800: move VIA2 device to Q800MachineStateMark Cave-Ayland1-0/+1
Also change the instantiation of the VIA2 device to use object_initialize_child(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-14-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-06-22q800: move VIA1 device to Q800MachineStateMark Cave-Ayland1-0/+2
Also change the instantiation of the VIA1 device to use object_initialize_child(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-13-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-06-22q800: reimplement mac-io region aliasing using IO memory regionMark Cave-Ayland1-0/+1
The current use of aliased memory regions causes us 2 problems: firstly the output of "info qom-tree" is absolutely huge and difficult to read, and secondly we have already reached the internal limit for memory regions as adding any new memory region into the mac-io region causes QEMU to assert with "phys_section_add: Assertion `map->sections_nb < TARGET_PAGE_SIZE' failed". Implement the mac-io region aliasing using a single IO memory region that applies IO_SLICE_MASK representing the maximum size of the aliased region and then forwarding the access to the existing mac-io memory region using the address space API. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-12-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-06-22q800: introduce mac-io container memory regionMark Cave-Ayland1-0/+1
Move all devices from the IO region to within the container in preparation for updating the IO aliasing mechanism. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230621085353.113233-11-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-06-22q800: move GLUE device to Q800MachineStateMark Cave-Ayland1-0/+2
Also change the instantiation of the GLUE device to use object_initialize_child(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-10-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-06-22q800: move GLUE device into separate q800-glue.c fileMark Cave-Ayland1-0/+50
This will allow the q800-glue.h header to be included separately so that the GLUE device can be referenced externally. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230621085353.113233-8-mark.cave-ayland@ilande.co.uk> [lv: update comment] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-06-22q800: move ROM memory region to Q800MachineStateMark Cave-Ayland1-0/+2
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-06-22q800: move CPU object into Q800MachineStateMark Cave-Ayland1-0/+3
Also change the instantiation of the CPU to use object_initialize_child() followed by a separate realisation. Restrict valid CPU types to m68040. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230621085353.113233-6-mark.cave-ayland@ilande.co.uk> [lv: update commit message] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-06-22q800: introduce Q800MachineStateMark Cave-Ayland1-0/+40
This provides an overall container and owner for Machine-related objects such as MemoryRegions. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230621085353.113233-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-02-21hw/m68k/mcf: Add missing 'exec/hwaddr.h' headerPhilippe Mathieu-Daudé1-0/+1
hwaddr type is defined in "exec/hwaddr.h". Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220209215446.58402-3-f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-01-19hw/m68k/next-cube: Add missing header comment to next-cube.hPeter Maydell1-0/+10
The next-cube.h file is missing the usual copyright-and-license header; add it (same as the next-cube.c one). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210115201206.17347-12-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2021-01-19hw/m68k/next-cube: Make next_irq GPIO inputs to NEXT_PC devicePeter Maydell1-1/+2
Make the next_irq function be GPIO inputs to the NEXT_PC device, rather than a freestanding set of qemu_irq lines. This fixes a minor Coverity issue where it correctly points out the trivial memory leak of the memory allocated in the call to qemu_allocate_irqs(). Fixes: CID 1421962 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210115201206.17347-8-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2021-01-19hw/m68k/next-cube: Make next_irq() function staticPeter Maydell1-2/+0
The next_irq() function is global, but isn't actually used anywhere outside next-cube.c. Make it static. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210115201206.17347-2-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2020-09-18Use OBJECT_DECLARE_SIMPLE_TYPE when possibleEduardo Habkost1-3/+1
This converts existing DECLARE_INSTANCE_CHECKER usage to OBJECT_DECLARE_SIMPLE_TYPE when possible. $ ./scripts/codeconverter/converter.py -i \ --pattern=AddObjectDeclareSimpleType $(git grep -l '' -- '*.[ch]') Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Paul Durrant <paul@xen.org> Message-Id: <20200916182519.415636-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-09Use DECLARE_*CHECKER* macrosEduardo Habkost1-1/+2
Generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]') Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-12-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-13-ehabkost@redhat.com> Message-Id: <20200831210740.126168-14-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-09Move QOM typedefs and add missing includesEduardo Habkost1-0/+1
Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TYPE. Patch generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]') which will split "typdef struct { ... } TypedefName" declarations. Followed by: $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \ $(git grep -l '' -- '*.[ch]') which will: - move the typedefs and #defines above the type check macros - add missing #include "qom/object.h" lines if necessary Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-9-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-10-ehabkost@redhat.com> Message-Id: <20200831210740.126168-11-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-03hw/m68k: QOMify the mcf5206 system integration moduleThomas Huth1-2/+1
The mcf5206 system integration module should be a proper device. Let's finally QOMify it. Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200819065201.4045-1-huth@tuxfamily.org>
2020-08-27mcf_fec: Move mcf_fec_state typedef to headerEduardo Habkost1-0/+1
Move typedef closer to the type check macros, to make it easier to convert the code to OBJECT_DEFINE_TYPE() in the future. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Tested-By: Roman Bolshakov <r.bolshakov@yadro.com> Message-Id: <20200825192110.3528606-21-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2019-09-07m68k: Add NeXTcube machineThomas Huth1-0/+38
It is still quite incomplete (no SCSI, no floppy emulation, no network, etc.), but the firmware already shows up the debug monitor prompt in the framebuffer display, so at least the very basics are already working. This code has been taken from Bryce Lanham's GSoC 2011 NeXT branch at https://github.com/blanham/qemu-NeXT/blob/next-cube/hw/next-cube.c and altered quite a bit to fit the latest interface and coding conventions of the current QEMU. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190831074519.32613-4-huth@tuxfamily.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2019-09-07m68k: Add NeXTcube keyboard deviceThomas Huth1-0/+2
It is likely still quite incomplete (e.g. mouse and interrupts are not implemented yet), but it is good enough for keyboard input at the firmware monitor. This code has been taken from Bryce Lanham's GSoC 2011 NeXT branch at https://github.com/blanham/qemu-NeXT/blob/next-cube/hw/next-kbd.c and altered to fit the latest interface of the current QEMU (e.g. to use memory_region_init_io() instead of cpu_register_physical_memory()). Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190831074519.32613-3-huth@tuxfamily.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2019-09-07m68k: Add NeXTcube framebuffer device emulationThomas Huth1-0/+7
The NeXTcube uses a linear framebuffer with 4 greyscale colors and a fixed resolution of 1120 * 832. This code has been taken from Bryce Lanham's GSoC 2011 NeXT branch at https://github.com/blanham/qemu-NeXT/blob/next-cube/hw/next-fb.c and altered to fit the latest interface of the current QEMU (e.g. the device has been "qdev"-ified etc.). Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190831074519.32613-2-huth@tuxfamily.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2019-06-12Supply missing header guardsMarkus Armbruster1-0/+5
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190604181618.19980-5-armbru@redhat.com>
2017-02-16hw/char/mcf_uart: QOMify the ColdFire UARTThomas Huth1-5/+1
Use type_init() etc. to adapt the ColdFire UART to the latest QEMU device conventions. Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <1485586582-6490-1-git-send-email-huth@tuxfamily.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-01-27char: rename CharDriverState ChardevMarc-André Lureau1-2/+2
Pick a uniform chardev type name. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-01-20m68k: QOMify the MCF Fast Ethernet Controller deviceThomas Huth2-4/+13
When running qemu-system-m68k with the "-net" parameter (for example simply "-net nic -net user"), there is currently a confusing warning message saying: Warning: requested NIC (anonymous, model mcf_fec) was not created (not supported by this machine?) This seems to happen because the MCF NIC has never been adapted to the currently expected QEMU device behavior. Thus let's QOMify the NIC now to get rid of the warning message. Signed-off-by: Thomas Huth <huth@tuxfamily.org> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-12-20Move target-* CPU file into a target/ folderThomas Huth1-1/+1
We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part] Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part] Acked-by: Michael Walle <michael@walle.cc> [lm32 part] Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part] Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part] Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part] Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part] Acked-by: Richard Henderson <rth@twiddle.net> [alpha part] Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part] Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part] Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [cris&microblaze part] Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part] Signed-off-by: Thomas Huth <thuth@redhat.com>
2016-05-19m68k: include cpu-qom.h in files that require M68KCPUPaolo Bonzini1-0/+2
This will keep things working when cpu.h will not be included indirectly almost everywhere (either directly or through qemu-common.h). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move headers to include/Paolo Bonzini1-0/+30
Many of these should be cleaned up with proper qdev-/QOM-ification. Right now there are many catch-all headers in include/hw/ARCH depending on cpu.h, and this makes it necessary to compile these files per-target. However, fixing this does not belong in these patches. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
generated by cgit v1.1 at 2025-01-11 22:54:28 +0000