index
:
riscv-gnu-toolchain/qemu.git
block
master
stable-0.10
stable-0.11
stable-0.12
stable-0.13
stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
stable-1.3
stable-1.4
stable-1.5
stable-1.6
stable-1.7
stable-2.0
stable-2.1
stable-2.10
stable-2.11
stable-2.12
stable-2.2
stable-2.3
stable-2.4
stable-2.5
stable-2.6
stable-2.7
stable-2.8
stable-2.9
stable-3.0
stable-3.1
stable-4.0
stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.1
stable-7.2
stable-8.0
stable-8.1
stable-8.2
stable-9.0
stable-9.1
stable-9.2
staging
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
staging-9.1
staging-9.2
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
include
/
hw
/
arm
/
xlnx-zynqmp.h
Age
Commit message (
Expand
)
Author
Files
Lines
2021-09-30
hw/arm: xlnx-zcu102: Add Xilinx eFUSE device
Tong Ho
1
-0
/
+3
2021-09-30
hw/arm: xlnx-zcu102: Add Xilinx BBRAM device
Tong Ho
1
-0
/
+2
2021-08-26
hw/arm/xlnx-zynqmp: Add unimplemented APU mmio
Tong Ho
1
-0
/
+7
2021-03-19
hw: Replace anti-social QOM type names
Markus Armbruster
1
-1
/
+1
2021-03-10
hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI
Xuzhou Cheng
1
-0
/
+2
2021-03-10
hw/arm: xlnx-zynqmp: Clean up coding convention issues
Xuzhou Cheng
1
-1
/
+2
2021-03-05
hw/arm/xlnx-zynqmp: Remove obsolete 'has_rpu' property
Philippe Mathieu-Daudé
1
-2
/
+0
2020-12-10
xlnx-zynqmp: Connect Xilinx ZynqMP CAN controllers
Vikram Garhwal
1
-0
/
+8
2020-09-18
Use OBJECT_DECLARE_SIMPLE_TYPE when possible
Eduardo Habkost
1
-3
/
+1
2020-09-09
Use DECLARE_*CHECKER* macros
Eduardo Habkost
1
-2
/
+2
2020-09-09
Move QOM typedefs and add missing includes
Eduardo Habkost
1
-2
/
+4
2019-10-24
hw: Move Xilinx ZynqMP RTC from hw/timer/ to hw/rtc/ subdirectory
Philippe Mathieu-Daudé
1
-1
/
+1
2019-08-16
ide: Include hw/ide/internal a bit less outside hw/ide/
Markus Armbruster
1
-1
/
+0
2019-08-16
include: Make headers more self-contained
Markus Armbruster
1
-0
/
+1
2019-06-12
Normalize position of header guard
Markus Armbruster
1
-1
/
+1
2019-06-12
Include qemu-common.h exactly where needed
Markus Armbruster
1
-1
/
+0
2019-05-23
arm: Rename hw/arm/arm.h to hw/arm/boot.h
Peter Maydell
1
-1
/
+1
2019-01-07
arm/xlnx-zynqmp: put APUs and RPUs in separate CPU clusters
Luc Michel
1
-0
/
+3
2018-08-14
xlnx-zynqmp: Improve GIC wiring and MMIO mapping
Luc Michel
1
-2
/
+2
2018-05-18
xlnx-zynqmp: Connect the ZynqMP GDMA and ADMA
Francisco Iglesias
1
-0
/
+5
2018-03-02
xlnx-zynqmp: Connect the RTC device
Alistair Francis
1
-0
/
+2
2018-01-26
xlnx-zynqmp: Connect the IPI device to the ZynqMP SoC
Alistair Francis
1
-0
/
+2
2017-12-13
xlnx-zcu102: Add support for the ZynqMP QSPI
Francisco Iglesias
1
-0
/
+5
2017-09-14
xlnx-zcu102: Add a machine level virtualization property
Alistair Francis
1
-0
/
+2
2016-06-14
arm: xlnx-zynqmp: Add xlnx-dp and xlnx-dpdma
KONRAD Frederic
1
-0
/
+4
2016-06-06
xlnx-zynqmp: Make the RPU subsystem optional
Edgar E. Iglesias
1
-0
/
+2
2016-06-06
xlnx-zynqmp: Add a secure prop to en/disable ARM Security Extensions
Edgar E. Iglesias
1
-0
/
+3
2016-01-21
xlnx-zynqmp: Connect the SPI devices
Alistair Francis
1
-0
/
+3
2016-01-15
xlnx-zynqmp: Add support for high DDR memory regions
Alistair Francis
1
-0
/
+12
2015-10-29
target-arm: xlnx-zynqmp: Add sdhci support.
Sai Pavan Boddu
1
-0
/
+3
2015-09-14
arm: xlnx-zynqmp: Fix up GIC region size
Nathan Rossi
1
-1
/
+1
2015-09-08
xlnx-zynqmp: Connect the sysbus AHCI to ZynqMP
Alistair Francis
1
-0
/
+3
2015-08-25
xlnx-zynqmp: Connect the four OCM banks
Alistair Francis
1
-0
/
+6
2015-06-19
arm: xlnx-zynqmp: Add 2xCortexR5 CPUs
Peter Crosthwaite
1
-0
/
+2
2015-06-19
arm: xlnx-zynqmp: Add boot-cpu property
Peter Crosthwaite
1
-0
/
+3
2015-06-19
arm: xlnx-zynqmp: Preface CPU variables with "apu"
Peter Crosthwaite
1
-2
/
+2
2015-05-18
arm: xlnx-zynqmp: Add UART support
Peter Crosthwaite
1
-0
/
+3
2015-05-18
arm: xlnx-zynqmp: Add GEM support
Peter Crosthwaite
1
-0
/
+3
2015-05-18
arm: xlnx-zynqmp: Add GIC
Peter Crosthwaite
1
-0
/
+14
2015-05-18
arm: Introduce Xilinx ZynqMP SoC
Peter Crosthwaite
1
-0
/
+38