riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2020-06-23	hw/arm/mps2: Add CMSDK AHB GPIO peripherals as unimplemented devices	Philippe Mathieu-Daudé	1	-2/+6
2020-06-23	hw/arm/mps2: Add CMSDK APB watchdog device	Philippe Mathieu-Daudé	2	-0/+8
2020-06-23	hw/arm/mps2: Rename CMSDK AHB peripheral region	Philippe Mathieu-Daudé	1	-1/+2
2020-06-23	hw/arm/mps2: Document CMSDK/FPGA APB subsystem sections	Philippe Mathieu-Daudé	1	-1/+4
2020-06-23	hw/arm: Use TYPE_VERSATILE_I2C instead of hardcoded string	Philippe Mathieu-Daudé	3	-3/+6
2020-06-23	hw/i2c: Add header for ARM SBCon two-wire serial bus interface	Philippe Mathieu-Daudé	1	-12/+5
2020-06-23	hw/i2c/versatile_i2c: Add SCL/SDA definitions	Philippe Mathieu-Daudé	1	-2/+5
2020-06-23	hw/i2c/versatile_i2c: Add definitions for register addresses	Philippe Mathieu-Daudé	1	-4/+10
2020-06-23	hw/watchdog/cmsdk-apb-watchdog: Add trace event for lock status	Philippe Mathieu-Daudé	2	-0/+2
2020-06-23	hw/arm/virt: Add 5.0 HW compat props	Andrew Jones	1	-0/+1
2020-06-22	Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200...	Peter Maydell	9	-82/+1010
2020-06-19	Merge remote-tracking branch 'remotes/kraxel/tags/audio-20200619-pull-request...	Peter Maydell	2	-2/+2
2020-06-19	hw/riscv: sifive_u: Add a dummy DDR memory controller device	Bin Meng	1	-0/+4
2020-06-19	hw/riscv: sifive_u: Sort the SoC memmap table entries	Bin Meng	1	-2/+2
2020-06-19	hw/riscv: sifive_u: Support different boot source per MSEL pin state	Bin Meng	1	-8/+31
2020-06-19	hw/riscv: sifive: Change SiFive E/U CPU reset vector to 0x1004	Bin Meng	2	-7/+9
2020-06-19	hw/riscv: sifive_u: Add a new property msel for MSEL pin state	Bin Meng	1	-0/+7
2020-06-19	hw/riscv: sifive_u: Rename serial property get/set functions to a generic name	Bin Meng	1	-6/+8
2020-06-19	hw/riscv: sifive_u: Add reset functionality	Bin Meng	1	-1/+23
2020-06-19	hw/riscv: sifive_gpio: Do not blindly trigger output IRQs	Bin Meng	1	-1/+3
2020-06-19	hw/riscv: sifive_u: Hook a GPIO controller	Bin Meng	1	-2/+41
2020-06-19	hw/riscv: sifive_gpio: Add a new 'ngpio' property	Bin Meng	1	-11/+19
2020-06-19	hw/riscv: sifive_gpio: Clean up the codes	Bin Meng	1	-8/+5
2020-06-19	hw/riscv: sifive_u: Generate device tree node for OTP	Bin Meng	1	-0/+11
2020-06-19	hw/riscv: sifive_u: Simplify the GEM IRQ connect code a little bit	Bin Meng	1	-6/+1
2020-06-19	hw/riscv: opentitan: Remove the riscv_ prefix of the machine* and soc* functions	Bin Meng	1	-15/+14
2020-06-19	hw/riscv: sifive_e: Remove the riscv_ prefix of the machine* and soc* functions	Bin Meng	1	-12/+12
2020-06-19	riscv/opentitan: Connect the UART device	Alistair Francis	1	-2/+23
2020-06-19	riscv/opentitan: Connect the PLIC device	Alistair Francis	1	-2/+12
2020-06-19	hw/intc: Initial commit of lowRISC Ibex PLIC	Alistair Francis	2	-0/+262
2020-06-19	hw/char: Initial commit of Ibex UART	Alistair Francis	3	-0/+497
2020-06-19	riscv/opentitan: Fix the ROM size	Alistair Francis	1	-1/+2
2020-06-19	sifive_e: Support the revB machine	Alistair Francis	1	-4/+30
2020-06-19	Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20200618' into staging	Peter Maydell	3	-38/+248
2020-06-19	hw/audio/gus: Fix registers 32-bit access	Allan Peramaki	2	-2/+2
2020-06-18	Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into st...	Peter Maydell	7	-248/+625
2020-06-18	hw/net/e1000e: Do not abort() on invalid PSRCTL register value	Philippe Mathieu-Daudé	1	-3/+7
2020-06-18	net: cadence_gem: Fix RX address filtering	Tong Ho	1	-15/+11
2020-06-18	net: cadence_gem: TX_LAST bit should be set by guest	Sai Pavan Boddu	1	-6/+0
2020-06-18	net: cadence_gem: Update the reset value for interrupt mask register	Sai Pavan Boddu	1	-0/+1
2020-06-18	net: cadnece_gem: Update irq_read_clear field of designcfg_debug1 reg	Sai Pavan Boddu	1	-1/+1
2020-06-18	net: cadence_gem: Add support for jumbo frames	Sai Pavan Boddu	1	-5/+46
2020-06-18	net: cadence_gem: Fix up code style	Sai Pavan Boddu	1	-101/+103
2020-06-18	net: cadence_gem: Move tx/rx packet buffert to CadenceGEMState	Sai Pavan Boddu	1	-21/+17
2020-06-18	net: cadence_gem: Set ISR according to queue in use	Sai Pavan Boddu	1	-10/+17
2020-06-18	net: cadence_gem: Define access permission for interrupt registers	Sai Pavan Boddu	1	-0/+14
2020-06-18	net: cadence_gem: Fix irq update w.r.t queue	Sai Pavan Boddu	1	-22/+3
2020-06-18	net: cadence_gem: Fix the queue address update during wrap around	Sai Pavan Boddu	1	-4/+33
2020-06-18	net: cadence_gem: Fix debug statements	Sai Pavan Boddu	1	-14/+13
2020-06-18	hw/net/tulip: Log descriptor overflows	Philippe Mathieu-Daudé	1	-0/+6