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AgeCommit message (Expand)AuthorFilesLines
2017-06-27xilinx_spips: allow mmio executionKONRAD Frederic1-19/+55
2017-02-10aspeed/smc: use a modulo to check segment limitsCédric Le Goater1-2/+2
2017-02-10aspeed/smc: handle dummies only in fast read modeCédric Le Goater1-3/+6
2017-01-27aspeed/smc: handle dummy bytes when doing fast reads in command modeCédric Le Goater1-0/+21
2017-01-20aspeed/smc: handle SPI flash Command modeCédric Le Goater1-25/+130
2017-01-20aspeed/smc: adjust the size of the register regionCédric Le Goater1-15/+10
2017-01-20aspeed/smc: unfold the AspeedSMCController arrayCédric Le Goater1-18/+73
2017-01-20aspeed/smc: autostrap CE0/1 configurationCédric Le Goater1-5/+27
2017-01-20aspeed/smc: rework the prototype of the AspeedSMCFlash helper routinesCédric Le Goater1-17/+22
2017-01-20aspeed/smc: remove call to aspeed_smc_update_cs() in reset functionCédric Le Goater1-2/+1
2017-01-20aspeed/smc: remove call to reset in realize functionCédric Le Goater1-2/+0
2017-01-09hw/ssi/imx_spi.c: Remove MSGDATA register supportJean-Christophe Dubois1-3/+8
2016-12-27aspeed/smc: improve segment register supportCédric Le Goater1-8/+9
2016-10-24xilinx: fix buffer overflow on realizePaolo Bonzini1-2/+5
2016-10-17aspeed: add support for the SMC segment registersCédric Le Goater1-5/+130
2016-10-17aspeed: create mapping regions for the maximum number of slavesCédric Le Goater1-3/+13
2016-10-17aspeed: add support for the AST2500 SoC SMC controllersCédric Le Goater1-1/+27
2016-10-17aspeed: move the flash module mapping address under the controller definitionCédric Le Goater1-4/+11
2016-10-04STM32F2xx: Add the SPI deviceAlistair Francis2-0/+226
2016-09-22imx: Use 'const char', not 'char const'Peter Maydell1-1/+1
2016-07-14ast2400: pretend DMAs are done for U-bootCédric Le Goater1-0/+4
2016-07-14ast2400: replace aspeed_smc_is_implemented()Cédric Le Goater1-20/+15
2016-07-04ast2400: add SPI flash slavesCédric Le Goater1-3/+147
2016-07-04ast2400: add SMC controllers (FMC and SPI)Cédric Le Goater2-0/+327
2016-07-04ssi: change ssi_slave_init to be a realize opsCédric Le Goater1-3/+3
2016-05-19hw: explicitly include qemu/log.hPaolo Bonzini2-0/+2
2016-05-12i.MX: Add the Freescale SPI ControllerJean-Christophe DUBOIS2-0/+455
2016-01-29hw: Clean up includesPeter Maydell1-0/+1
2016-01-29arm devices: Clean up includesPeter Maydell2-0/+2
2016-01-29arm: Clean up includesPeter Maydell2-0/+2
2016-01-21xilinx_spips: Separate the state struct into a headerAlistair Francis1-42/+4
2016-01-21ssi: Move ssi.h into a separate directoryAlistair Francis4-4/+4
2015-09-07arm: Use g_new() & friends where that makes obvious senseMarkus Armbruster1-2/+1
2015-03-19omap: Fix warnings from SparseStefan Weil1-1/+2
2014-08-15ssi: xilinx_spi: Initialise CS GPIOs as NULLPeter Crosthwaite1-1/+1
2014-05-28ssi: Name the CS GPIOPeter Crosthwaite1-2/+2
2014-05-13savevm: Remove all the unneeded version_minimum_id_old (arm)Juan Quintela4-6/+2
2014-05-05pl022: fix buffer overun on invalid state loadMichael S. Tsirkin1-0/+14
2014-03-12ssi: Convert legacy SSI_BUS -> BUS castsPeter Crosthwaite1-4/+5
2014-03-12ssi: Convert legacy SSI_SLAVE -> DEVICE castsPeter Crosthwaite1-1/+1
2014-03-10hw/ssi/xilinx_spips.c: Avoid shifting left into sign bitPeter Maydell1-2/+2
2013-07-29xilinx_spi: QOM cast cleanupAndreas Färber1-11/+16
2013-07-29pl022: QOM cast cleanupAndreas Färber1-8/+13
2013-07-29pl022: Rename pl022_state to PL022StateAndreas Färber1-36/+36
2013-07-04hw/s*: pass owner to memory_region_init* functionsPaolo Bonzini3-4/+6
2013-07-04memory: add owner argument to initialization functionsPaolo Bonzini4-5/+5
2013-06-07qdev: Drop FROM_QBUS() macroAndreas Färber1-1/+1
2013-06-03xilinx_spips: lqspi: Fix byte/misaligned accessPeter Crosthwaite1-14/+17
2013-06-03xilinx_spips: lqspi: Push more data to tx-fifoPeter Crosthwaite1-4/+7
2013-06-03xilinx_spips: Multiple debug verbosity levelsPeter Crosthwaite1-28/+42
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