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path: root/hw/riscv/opentitan.c
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2020-08-27opentitan: Rename memmap enum constantsEduardo Habkost1-42/+42
2020-07-10error: Eliminate error_propagate() with Coccinelle, part 1Markus Armbruster1-5/+2
2020-07-10qom: Put name parameter before value / visitor parameterMarkus Armbruster1-2/+2
2020-07-10qdev: Use returned bool to check for qdev_realize() etc. failureMarkus Armbruster1-4/+2
2020-06-19hw/riscv: opentitan: Remove the riscv_ prefix of the machine* and soc* functionsBin Meng1-15/+14
2020-06-19riscv/opentitan: Connect the UART deviceAlistair Francis1-2/+23
2020-06-19riscv/opentitan: Connect the PLIC deviceAlistair Francis1-2/+12
2020-06-19riscv/opentitan: Fix the ROM sizeAlistair Francis1-1/+2
2020-06-15qdev: Convert bus-less devices to qdev_realize() with CoccinelleMarkus Armbruster1-2/+1
2020-06-15sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 2Markus Armbruster1-4/+2
2020-06-15qom: Less verbose object_initialize_child()Markus Armbruster1-2/+1
2020-06-15riscv: Fix to put "riscv.hart_array" devices on sysbusMarkus Armbruster1-3/+2
2020-06-03riscv: Initial commit of OpenTitan machineAlistair Francis1-0/+184