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2019-07-02xics/spapr: Register RTAS/hypercalls once at machine initGreg Kurz1-1/+2
QEMU may crash when running a spapr machine in 'dual' interrupt controller mode on some older (but not that old, eg. ubuntu 18.04.2) KVMs with partial XIVE support: qemu-system-ppc64: hw/ppc/spapr_rtas.c:411: spapr_rtas_register: Assertion `!name || !rtas_table[token].name' failed. XICS is controlled by the guest thanks to a set of RTAS calls. Depending on whether KVM XICS is used or not, the RTAS calls are handled by KVM or QEMU. In both cases, QEMU needs to expose the RTAS calls to the guest through the "rtas" node of the device tree. The spapr_rtas_register() helper takes care of all of that: it adds the RTAS call token to the "rtas" node and registers a QEMU callback to be invoked when the guest issues the RTAS call. In the KVM XICS case, QEMU registers a dummy callback that just prints an error since it isn't supposed to be invoked, ever. Historically, the XICS controller was setup during machine init and released during final teardown. This changed when the 'dual' interrupt controller mode was added to the spapr machine: in this case we need to tear the XICS down and set it up again during machine reset. The crash happens because we indeed have an incompatibility with older KVMs that forces QEMU to fallback on emulated XICS, which tries to re-registers the same RTAS calls. This could be fixed by adding proper rollback that would unregister RTAS calls on error. But since the emulated RTAS calls in QEMU can now detect when they are mistakenly called while KVM XICS is in use, it seems simpler to register them once and for all at machine init. This fixes the crash and allows to remove some now useless lines of code. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <156044429963.125694.13710679451927268758.stgit@bahia.lab.toulouse-stg.fr.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-07-02spapr_pci: Fix potential NULL pointer dereference in spapr_dt_pci_bus()Philippe Mathieu-Daudé1-6/+5
Commit 14e714900f6 refactored the call to spapr_dt_drc(), introducing a potential NULL pointer dereference while accessing bus->parent_dev. A trivial audit show 'bus' is not null in the two places the static function spapr_dt_drc() is called. Since the 'bus' parameter is not NULL in both callers, remove remove the test on if (bus), and add an assert() to silent static analyzers. This fixes: /hw/ppc/spapr_pci.c: 1367 in spapr_dt_pci_bus() >>> CID 1401933: Null pointer dereferences (FORWARD_NULL) >>> Dereferencing null pointer "bus". 1367 ret = spapr_dt_drc(fdt, offset, OBJECT(bus->parent_dev), 1368 SPAPR_DR_CONNECTOR_TYPE_PCI); Fixes: 14e714900f6 Reported-by: Coverity (CID 1401933) Suggested-by: Greg Kurz <groug@kaod.org> Suggested-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190613213406.22053-1-philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-07-02ppc/pnv: remove xscom_base field from PnvChipCédric Le Goater1-10/+0
It has now became useless with the previous patch. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190612174345.9799-3-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-07-02ppc/pnv: fix XSCOM MMIO base address for P9 machines with multiple chipsCédric Le Goater2-13/+28
The PNV_XSCOM_BASE and PNV_XSCOM_SIZE macros are specific to POWER8 and they are used when the device tree is populated and the MMIO region created, even for POWER9 chips. This is not too much of a problem today because we don't have important devices on the second chip, but we might have oneday (PHBs). Fix by using the appropriate macros in case of P9. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190612174345.9799-2-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-06-12Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.1-20190612' ↵Peter Maydell4-202/+335
into staging ppc patch queue 2019-06-12 Next pull request against qemu-4.1. The big thing here is adding support for hot plug of P2P bridges, and PCI devices under P2P bridges on the "pseries" machine (which doesn't use SHPC). Other than that there's just a handful of fixes and small enhancements. # gpg: Signature made Wed 12 Jun 2019 06:47:56 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-4.1-20190612: ppc/xive: Make XIVE generate the proper interrupt types ppc/pnv: activate the "dumpdtb" option on the powernv machine target/ppc: Use tcg_gen_gvec_bitsel spapr: Allow hot plug/unplug of PCI bridges and devices under PCI bridges spapr: Direct all PCI hotplug to host bridge, rather than P2P bridge spapr: Don't use bus number for building DRC ids spapr: Clean up DRC index construction spapr: Clean up spapr_drc_populate_dt() spapr: Clean up dt creation for PCI buses spapr: Clean up device tree construction for PCI devices spapr: Clean up device node name generation for PCI devices target/ppc: Fix lxvw4x, lxvh8x and lxvb16x spapr_pci: Improve error message Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster13-8/+10
No header includes qemu-common.h after this commit, as prescribed by qemu-common.h's file comment. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-5-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for include/hw/arm/xlnx-zynqmp.h hw/arm/nrf51_soc.c hw/arm/msf2-soc.c block/qcow2-refcount.c block/qcow2-cluster.c block/qcow2-cache.c target/arm/cpu.h target/lm32/cpu.h target/m68k/cpu.h target/mips/cpu.h target/moxie/cpu.h target/nios2/cpu.h target/openrisc/cpu.h target/riscv/cpu.h target/tilegx/cpu.h target/tricore/cpu.h target/unicore32/cpu.h target/xtensa/cpu.h; bsd-user/main.c and net/tap-bsd.c fixed up]
2019-06-12Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster17-4/+21
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-4-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for hw/usb/dev-hub.c hw/misc/exynos4210_rng.c hw/misc/bcm2835_rng.c hw/misc/aspeed_scu.c hw/display/virtio-vga.c hw/arm/stm32f205_soc.c; ui/cocoa.m fixed up]
2019-06-12ppc/pnv: activate the "dumpdtb" option on the powernv machineCédric Le Goater1-0/+2
This is a good way to debug the DT creation for current PowerNV machines and new ones to come. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190606174732.13051-1-clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-06-12spapr: Allow hot plug/unplug of PCI bridges and devices under PCI bridgesDavid Gibson1-13/+102
The pseries machine type already allows PCI hotplug and unplug via the PAPR mechanism, but only on the root bus of each PHB. This patch extends this to allow PCI to PCI bridges to be hotplugged, and devices to be hotplugged or unplugged under P2P bridges. For now we disallow hot unplugging P2P bridges. I tried doing that, but haven't managed to get it working, I think due to some guest side problems that need further investigation. To do this we dynamically construct DRCs when bridges are hot (or cold) added, which can in turn be used to hotplug devices under the bridge. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Michael S. Tsirkin <mst@redhat.com>
2019-06-12spapr: Direct all PCI hotplug to host bridge, rather than P2P bridgeDavid Gibson1-0/+11
A P2P bridge will attempt to handle the hotplug with SHPC, which doesn't work in the PAPR environment. Instead we want to direct all PCI hotplug actions to the PAPR specific host bridge which will use the PAPR hotplug mechanism. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Michael S. Tsirkin <mst@redhat.com>
2019-06-12spapr: Don't use bus number for building DRC idsDavid Gibson1-14/+40
DRC ids are more or less arbitrary, as long as they're consistent. For PCI, we notionally build them from the phb's index along with PCI bus number, slot and function number. Using bus number is broken, however, because it can change if the guest re-enumerates the PCI topology for whatever reason (e.g. due to hotplug of a bridge, which we don't support yet but want to). Fortunately, there's an alternative. Bridges are required to have a unique non-zero "chassis number" that we can use instead. Adjust the code to use that instead. This looks like it would introduce a guest visible breaking change, but in fact it does not because we don't yet ever use non-zero bus numbers. Both chassis and bus number are always 0 for the root bus, so there's no change for the existing cases. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Michael S. Tsirkin <mst@redhat.com>
2019-06-12spapr: Clean up DRC index constructionDavid Gibson1-56/+68
spapr_pci.c currently has several confusingly similarly named functions for various conversions between representations of DRCs. Make things clearer by renaming things in a more consistent XXX_from_YYY() manner and remove some called-only-once variants in favour of open coding. While we're at it, move this code together in the file to avoid some extra forward references, and split out construction and removal of DRCs for the host bridge into helper functions. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Michael S. Tsirkin <mst@redhat.com>
2019-06-12spapr: Clean up spapr_drc_populate_dt()David Gibson3-13/+10
This makes some minor cleanups to spapr_drc_populate_dt(), renaming it to the shorter and more idiomatic spapr_dt_drc() along the way. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <groug@kaod.org> Acked-by: Michael S. Tsirkin <mst@redhat.com>
2019-06-12spapr: Clean up dt creation for PCI busesDavid Gibson2-70/+77
Device nodes for PCI bridges (both host and P2P) describe both the bridge device itself and the bus hanging off it, handling of this is a bit of a mess. spapr_dt_pci_device() has a few things it only adds for non-bridges, but always adds #address-cells and #size-cells which should only appear for bridges. But the walking down the subordinate PCI bus is done in one of its callers spapr_populate_pci_devices_dt(). The PHB dt creation in spapr_populate_pci_dt() open codes some similar logic to the bridge case. This patch consolidates things in a bunch of ways: * Bus specific dt info is now created in spapr_dt_pci_bus() used for both P2P bridges and the host bridge. This includes walking subordinate devices * spapr_dt_pci_device() now calls spapr_dt_pci_bus() when called on a P2P bridge * We do detection of bridges with the is_bridge field of the device class, rather than checking PCI config space directly, for consistency with qemu's core PCI code. * Several things are renamed for brevity and clarity Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Michael S. Tsirkin <mst@redhat.com>
2019-06-12spapr: Clean up device tree construction for PCI devicesDavid Gibson1-64/+55
spapr_create_pci_child_dt() is a trivial wrapper around spapr_populate_pci_child_dt(), but is the latter's only caller. So fold them together into spapr_dt_pci_device(), which closer matches our modern naming convention. While there, make a number of cleanups to the function itself. This is mostly using more temporary locals to avoid awkwardly long lines, and in some cases avoiding double reads of PCI config space variables. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <groug@kaod.org> Acked-by: Michael S. Tsirkin <mst@redhat.com>
2019-06-12spapr: Clean up device node name generation for PCI devicesDavid Gibson1-25/+16
spapr_populate_pci_child_dt() adds a 'name' property to the device tree node for PCI devices. This is never necessary for a flattened device tree, it is implicit in the name added when the node is constructed. In fact anything we do add to a 'name' property will be overwritten with something derived from the structural name in the guest firmware (but in fact it is exactly the same bytes). So, remove that. In addition, pci_get_node_name() is very simple, so fold it into its (also simple) sole caller spapr_create_pci_child_dt(). While we're there rename pci_find_device_name() to the shorter and more accurate dt_name_from_class(). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <groug@kaod.org> Acked-by: Michael S. Tsirkin <mst@redhat.com>
2019-06-12spapr_pci: Improve error messageGreg Kurz1-1/+8
Every PHB must have a unique index. This is checked at realize but when a duplicate index is detected, an error message mentioning BUIDs is printed. This doesn't help much, especially since BUID is an internal concept that is no longer exposed to the user. Fix the message to mention the index property instead of BUID. As a bonus print a list of indexes already in use. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <155915010892.2061314.10485622810149098411.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-06-11qemu-common: Move tcg_enabled() etc. to sysemu/tcg.hMarkus Armbruster1-0/+2
Other accelerators have their own headers: sysemu/hax.h, sysemu/hvf.h, sysemu/kvm.h, sysemu/whpx.h. Only tcg_enabled() & friends sit in qemu-common.h. This necessitates inclusion of qemu-common.h into headers, which is against the rules spelled out in qemu-common.h's file comment. Move tcg_enabled() & friends into their own header sysemu/tcg.h, and adjust #include directives. Cc: Richard Henderson <rth@twiddle.net> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-2-armbru@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [Rebased with conflicts resolved automatically, except for accel/tcg/tcg-all.c]
2019-06-10target/ppc: Use env_cpu, env_archcpuRichard Henderson3-12/+12
Cleanup in the boilerplate that each target must define. Replace ppc_env_get_cpu with env_archcpu. The combination CPU(ppc_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-06Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell1-24/+10
virtio, pci, pc: cleanups, features stricter rules for acpi tables: we now fail on any difference that isn't whitelisted. vhost-scsi migration. some cleanups all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Wed 05 Jun 2019 20:55:04 BST # gpg: using RSA key 281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: bios-tables-test: ignore identical binaries tests: acpi: add simple arm/virt testcase tests: add expected ACPI tables for arm/virt board bios-tables-test: list all tables that differ vhost-scsi: Allow user to enable migration vhost-scsi: Add VMState descriptor vhost-scsi: The vhost backend should be stopped when the VM is not running bios-tables-test: add diff allowed list vhost: fix memory leak in vhost_user_scsi_realize vhost: fix incorrect print type vhost: remove the dead code docs: smbios: remove family=x from type2 entry description pci: Fold pci_get_bus_devfn() into its sole caller pci: Make is_bridge a bool pcie: Simplify pci_adjust_config_limit() acpi: pci: use build_append_foo() API to construct MCFG hw/acpi: Consolidate build_mcfg to pci.c Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-29pcie: Simplify pci_adjust_config_limit()David Gibson1-24/+10
Since c2077e2c "pci: Adjust PCI config limit based on bus topology", pci_adjust_config_limit() has been used in the config space read and write paths to only permit access to extended config space on buses which permit it. Specifically it prevents access on devices below a vanilla-PCI bus via some combination of bridges, even if both the host bridge and the device itself are PCI-E. It accomplishes this with a somewhat complex call up the chain of bridges to see if any of them prohibit extended config space access. This is overly complex, since we can always know if the bus will support such access at the point it is constructed. This patch simplifies the test by using a flag in the PCIBus instance indicating whether extended configuration space is accessible. It is false for vanilla PCI buses. For PCI-E buses, it is true for root buses and equal to the parent bus's's capability otherwise. For the special case of sPAPR's paravirtualized PCI root bus, which acts mostly like vanilla PCI, but does allow extended config space access, we override the default value of the flag from the host bridge code. This should cause no behavioural change. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <20190513061939.3464-4-david@gibson.dropbear.id.au> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-05-29ppc/pnv: add dummy XSCOM registers for PRD initializationCédric Le Goater1-0/+18
PRD (Processor recovery diagnostics) is a service available on OpenPower systems. The opal-prd daemon initializes the PowerPC Processor through the XSCOM bus and then waits for hardware diagnostic events. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190527071722.31424-1-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-05-29ppc/pnv: introduce new skiboot platform propertiesCédric Le Goater1-3/+10
Newer skiboots (after 6.3) support QEMU platforms that have characteristics closer to real OpenPOWER systems. The CPU type is used to define the BMC drivers: Aspeed AST2400 for POWER8 processors and AST2500 for POWER9s. Advertise the new platform property names, "qemu,powernv8" and "qemu,powernv9", using the CPU type chosen for the QEMU PowerNV machine. Also, advertise the original platform name "qemu,powernv" in case of POWER8 processors for compatibility with older skiboots. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190527071749.31499-1-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-05-29spapr: Don't migrate the hpt_maxpagesize cap to older machine typesGreg Kurz2-1/+12
Commit 0b8c89be7f7b added the hpt_maxpagesize capability to the migration stream. This is okay for new machine types but it breaks backward migration to older QEMUs, which don't expect the extra subsection. Add a compatibility boolean flag to the sPAPR machine class and use it to skip migration of the capability for machine types 4.0 and older. This fixes migration to an older QEMU. Note that the destination will emit a warning: qemu-system-ppc64: warning: cap-hpt-max-page-size lower level (16) in incoming stream than on destination (24) This is expected and harmless though. It is okay to migrate from a lower HPT maximum page size (64k) to a greater one (16M). Fixes: 0b8c89be7f7b "spapr: Add forgotten capability to migration stream" Based-on: <20190522074016.10521-3-clg@kaod.org> Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <155853262675.1158324.17301777846476373459.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-05-29spapr: change default interrupt mode to 'dual'Cédric Le Goater1-1/+2
Now that XIVE support is complete (QEMU emulated and KVM devices), change the pseries machine to advertise both interrupt modes: XICS (P7/P8) and XIVE (P9). The machine default interrupt modes depends on the version. Current settings are: pseries default interrupt mode 4.1 dual 4.0 xics 3.1 xics 3.0 legacy xics (different IRQ number space layout) Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190522074016.10521-3-clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-05-29spapr/irq: add KVM support to the 'dual' machineCédric Le Goater1-20/+38
The interrupt mode is chosen by the CAS negotiation process and activated after a reset to take into account the required changes in the machine. This brings new constraints on how the associated KVM IRQ device is initialized. Currently, each model takes care of the initialization of the KVM device in their realize method but this is not possible anymore as the initialization needs to be done globaly when the interrupt mode is known, i.e. when machine is reseted. It also means that we need a way to delete a KVM device when another mode is chosen. Also, to support migration, the QEMU objects holding the state to transfer should always be available but not necessarily activated. The overall approach of this proposal is to initialize both interrupt mode at the QEMU level to keep the IRQ number space in sync and to allow switching from one mode to another. For the KVM side of things, the whole initialization of the KVM device, sources and presenters, is grouped in a single routine. The XICS and XIVE sPAPR IRQ reset handlers are modified accordingly to handle the init and the delete sequences of the KVM device. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20190513084245.25755-15-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-05-29spapr/irq: introduce a spapr_irq_init_device() helperCédric Le Goater1-19/+70
The way the XICS and the XIVE devices are initialized follows the same pattern. First, try to connect to the KVM device and if not possible fallback on the emulated device, unless a kernel_irqchip is required. The spapr_irq_init_device() routine implements this sequence in generic way using new sPAPR IRQ handlers ->init_emu() and ->init_kvm(). The XIVE init sequence is moved under the associated sPAPR IRQ ->init() handler. This will change again when KVM support is added for the dual interrupt mode. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20190513084245.25755-12-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-05-29spapr/xive: activate KVM supportCédric Le Goater1-9/+0
All is in place for KVM now. State synchronization and migration will come next. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20190513084245.25755-8-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-05-29spapr/xive: add migration support for KVMCédric Le Goater1-1/+1
When the VM is stopped, the VM state handler stabilizes the XIVE IC and marks the EQ pages dirty. These are then transferred to destination before the transfer of the device vmstates starts. The SpaprXive interrupt controller model captures the XIVE internal tables, EAT and ENDT and the XiveTCTX model does the same for the thread interrupt context registers. At restart, the SpaprXive 'post_load' method restores all the XIVE states. It is called by the sPAPR machine 'post_load' method, when all XIVE states have been transferred and loaded. Finally, the source states are restored in the VM change state handler when the machine reaches the running state. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20190513084245.25755-7-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-05-29spapr/xive: add KVM supportCédric Le Goater2-1/+10
This introduces a set of helpers when KVM is in use, which create the KVM XIVE device, initialize the interrupt sources at a KVM level and connect the interrupt presenters to the vCPU. They also handle the initialization of the TIMA and the source ESB memory regions of the controller. These have a different type under KVM. They are 'ram device' memory mappings, similarly to VFIO, exposed to the guest and the associated VMAs on the host are populated dynamically with the appropriate pages using a fault handler. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20190513084245.25755-3-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-05-29spapr: Print out extra hints when CAS negotiation of interrupt mode failsGreg Kurz1-2/+4
Let's suggest to the user how the machine should be configured to allow the guest to boot successfully. Suggested-by: Satheesh Rajendran <sathnaga@linux.vnet.ibm.com> Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <155799221739.527449.14907564571096243745.stgit@bahia.lan> Reviewed-by: Satheesh Rajendran <sathnaga@linux.vnet.ibm.com> Tested-by: Satheesh Rajendran <sathnaga@linux.vnet.ibm.com> [dwg: Adjusted for style error] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-05-29spapr: Fix phb_placement backwards compatibilityDavid Gibson1-13/+15
When we added support for NVLink2 passthrough devices, we changed the phb_placement hook to handle the placement of NVLink2 bridges' specific resources. For compatibility we use a version that doesn't do this allocation for old machine types. However, because of the delay between when the patch was posted and when it was merged, we ended up with that compatibility hook applying for machine versions 3.1 and earlier whereas it should apply for 4.0 and earlier (since the patch was applied early in the 4.1 tree). Fixes: ec132efaa81 "spapr: Support NVIDIA V100 GPU with NVLink2" Reported-by: Laurent Vivier <lvivier@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2019-05-29spapr: Add forgotten capability to migration streamDavid Gibson2-0/+2
spapr machine capabilities are supposed to be sent in the migration stream so that we can sanity check the source and destination have compatible configuration. Unfortunately, when we added the hpt-max-page-size capability, we forgot to add it to the migration state. This means that we can generate spurious warnings when both ends are configured for large pages, or potentially fail to warn if the source is configured for huge pages, but the destination is not. Fixes: 2309832afda "spapr: Maximum (HPT) pagesize property" Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org>
2019-05-29target/ppc: Set PSSCR_EC on cpu halt to prevent spurious wakeupSuraj Jitindar Singh2-1/+7
The processor stop status and control register (PSSCR) is used to control the power saving facilities of the thread. The exit criterion bit (EC) is used to specify whether the thread should be woken by any interrupt (EC == 0) or only an interrupt enabled in the LPCR to wake the thread (EC == 1). The rtas facilities start-cpu and self-stop are used to transition a vcpu between the stopped and running states. When a vcpu is stopped it may only be started again by the start-cpu rtas call. Currently a vcpu in the stopped state will start again whenever an interrupt comes along due to PSSCR_EC being cleared, and while this is architecturally correct for a hardware thread, a vcpu is expected to only be woken by calling start-cpu. This means when performing a reboot on a tcg machine that the secondary threads will restart while the primary is still in slof, this is unsupported and causes call traces like: SLOF ********************************************************************** QEMU Starting Build Date = Jan 14 2019 18:00:39 FW Version = git-a5b428e1c1eae703 Press "s" to enter Open Firmware. qemu: fatal: Trying to deliver HV exception (MSR) 70 with no HV support NIP 6d61676963313230 LR 000000003dbe0308 CTR 6d61676963313233 XER 0000000000000000 CPU#1 MSR 0000000000000000 HID0 0000000000000000 HF 0000000000000000 iidx 3 didx 3 TB 00000026 115746031956 DECR 18446744073326238463 GPR00 000000003dbe0308 000000003e669fe0 000000003dc10700 0000000000000003 GPR04 000000003dc62198 000000003dc62178 000000003dc0ea48 0000000000000030 GPR08 000000003dc621a8 0000000000000018 000000003e466008 000000003dc50700 GPR12 c00000000093a4e0 c00000003ffff300 c00000003e533f90 0000000000000000 GPR16 0000000000000000 0000000000000000 000000003e466010 000000003dc0b040 GPR20 0000000000008000 000000000000f003 0000000000000006 000000003e66a050 GPR24 000000003dc06400 000000003dc0ae70 0000000000000003 000000000000f001 GPR28 000000003e66a060 ffffffffffffffff 6d61676963313233 0000000000000028 CR 28000222 [ E L - - - E E E ] RES ffffffffffffffff FPR00 0000000000000000 0000000000000000 0000000000000000 0000000000000000 FPR04 0000000000000000 0000000000000000 0000000000000000 0000000000000000 FPR08 0000000000000000 0000000000000000 0000000000000000 00000000311825e0 FPR12 00000000311825e0 0000000000000000 0000000000000000 0000000000000000 FPR16 0000000000000000 0000000000000000 0000000000000000 0000000000000000 FPR20 0000000000000000 0000000000000000 0000000000000000 0000000000000000 FPR24 0000000000000000 0000000000000000 0000000000000000 0000000000000000 FPR28 0000000000000000 0000000000000000 0000000000000000 0000000000000000 FPSCR 0000000000000000 SRR0 000000003dbe06b0 SRR1 0000000000080000 PVR 00000000004e1200 VRSAVE 0000000000000000 SPRG0 000000003dbe0308 SPRG1 000000003e669fe0 SPRG2 00000000000000d8 SPRG3 000000003dbe0308 SPRG4 0000000000000000 SPRG5 0000000000000000 SPRG6 0000000000000000 SPRG7 0000000000000000 HSRR0 6d61676963313230 HSRR1 0000000000000000 CFAR 000000003dbe3e64 LPCR 0000000004020008 PTCR 0000000000000000 DAR 0000000000000000 DSISR 0000000000000000 Aborted (core dumped) To fix this, set the PSSCR_EC bit when a vcpu is stopped to disable it from coming back online until the start-cpu rtas call is made. Fixes: 21c0d66a9c99 ("target/ppc: Fix support for "STOP light" states on POWER9") Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Message-Id: <20190516005744.24366-1-sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-05-29spapr/xive: Sanity checks of OV5 during CASGreg Kurz1-0/+24
If a machine is started with ic-mode=xive but the guest only knows about XICS, eg. an RHEL 7.6 guest, the kernel panics. This is expected but a bit unfortunate since the crash doesn't provide much information for the end user to guess what's happening. Detect that during CAS and exit QEMU with a proper error message instead, like it is already done for the MMU. Even if this is less likely to happen, the opposite case of a guest that only knows about XIVE would certainly fail all the same if the machine is started with ic-mode=xics. Also, the only valid values a guest can pass in byte 23 of OV5 during CAS are 0b00 (XIVE legacy mode) and 0b01 (XIVE exploitation mode). Any other value is a bug, at least with the current spec. Again, it does not seem right to let the guest go on without a precise idea of the interrupt mode it asked for. Handle these cases as well. Reported-by: Satheesh Rajendran <sathnaga@linux.vnet.ibm.com> Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <155793986451.464434.12887933000007255549.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-05-29target/ppc: Add ibm,purr and ibm,spurr device-tree propertiesSuraj Jitindar Singh1-1/+4
The ibm,purr and ibm,spurr device tree properties are used to indicate that the processor implements the Processor Utilisation of Resources Register (PURR) and Scaled Processor Utilisation of Resources Registers (SPURR), respectively. Each property has a single value which represents the level of architecture supported. A value of 1 for ibm,purr means support for the version of the PURR defined in book 3 in version 2.02 of the architecture. A value of 1 for ibm,spurr means support for the version of the SPURR defined in version 2.05 of the architecture. Add these properties for all processors for which the PURR and SPURR registers are generated. Fixes: 0da6f3fef9a "spapr: Reorganize CPU dt generation code" Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Message-Id: <20190506014803.21299-1-sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-05-29hw/ppc/40p: use 1900 as a base yearArtyom Tarasenko1-1/+3
AIX 5.1 expects the base year to be 1900. Adjust accordingly. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190505152839.18650-4-philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-05-29hw/ppc/40p: Move the MC146818 RTC to the board where it belongsPhilippe Mathieu-Daudé1-0/+3
The MC146818 RTC was incorrectly added to the i82378 chipset in commit a04ff940974a. In the next commit (506b7ddf8893) the PReP machine use the i82378. Since the MC146818 is specific to the PReP machine, move its use there. Fixes: a04ff940974a Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190505152839.18650-3-philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-05-29hw/ppc/prep: use TYPE_MC146818_RTC instead of a hardcoded stringPhilippe Mathieu-Daudé1-1/+1
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190505152839.18650-2-philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-05-24hw/ppc/pnv: Use object_initialize_child for correct reference countingPhilippe Mathieu-Daudé1-8/+4
As explained in commit aff39be0ed97: Both functions, object_initialize() and object_property_add_child() increase the reference counter of the new object, so one of the references has to be dropped afterwards to get the reference counting right. Otherwise the child object will not be properly cleaned up when the parent gets destroyed. Thus let's use now object_initialize_child() instead to get the reference counting here right. This patch was generated using the following Coccinelle script (with a bit of manual fix-up for overly long lines): @use_object_initialize_child@ expression parent_obj; expression child_ptr; expression child_name; expression child_type; expression child_size; expression errp; @@ ( - object_initialize(child_ptr, child_size, child_type); + object_initialize_child(parent_obj, child_name, child_ptr, child_size, + child_type, &error_abort, NULL); ... when != parent_obj - object_property_add_child(parent_obj, child_name, OBJECT(child_ptr), NULL); ... ?- object_unref(OBJECT(child_ptr)); | - object_initialize(child_ptr, child_size, child_type); + object_initialize_child(parent_obj, child_name, child_ptr, child_size, + child_type, errp, NULL); ... when != parent_obj - object_property_add_child(parent_obj, child_name, OBJECT(child_ptr), errp); ... ?- object_unref(OBJECT(child_ptr)); ) While the object_initialize() function doesn't take an 'Error *errp' argument, the object_initialize_child() does. Since this code is used when a machine is created (and is not yet running), we deliberately choose to use the &error_abort argument instead of ignoring errors if an object creation failed. Suggested-by: Eduardo Habkost <ehabkost@redhat.com> Inspired-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190507163416.24647-2-philmd@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2019-05-23hw/ppc: Implement fw_cfg_arch_key_name()Philippe Mathieu-Daudé2-1/+46
Implement fw_cfg_arch_key_name(), which returns the name of a ppc-specific key. The fw_cfg device is used by the machine using OpenBIOS: - 40p - mac99 (oldworld) - g3beige (newworld) Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20190422195020.1494-6-philmd@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-27Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.1-20190426' ↵Peter Maydell8-80/+580
into staging ppc patch queue 2019-04-26 Here's the first ppc target pull request for qemu-4.1. This has a number of things that have accumulated while qemu-4.0 was frozen. * A number of emulated MMU improvements from Ben Herrenschmidt * Assorted cleanups fro Greg Kurz * A large set of mostly mechanical cleanups from me to make target/ppc much closer to compliant with the modern coding style * Support for passthrough of NVIDIA GPUs using NVLink2 As well as some other assorted fixes. # gpg: Signature made Fri 26 Apr 2019 07:02:19 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-4.1-20190426: (36 commits) target/ppc: improve performance of large BAT invalidations ppc/hash32: Rework R and C bit updates ppc/hash64: Rework R and C bit updates ppc/spapr: Use proper HPTE accessors for H_READ target/ppc: Don't check UPRT in radix mode when in HV real mode target/ppc/kvm: Convert DPRINTF to traces target/ppc/trace-events: Fix trivial typo spapr: Drop duplicate PCI swizzle code spapr_pci: Get rid of duplicate code for node name creation target/ppc: Style fixes for translate/spe-impl.inc.c target/ppc: Style fixes for translate/vmx-impl.inc.c target/ppc: Style fixes for translate/vsx-impl.inc.c target/ppc: Style fixes for translate/fp-impl.inc.c target/ppc: Style fixes for translate.c target/ppc: Style fixes for translate_init.inc.c target/ppc: Style fixes for monitor.c target/ppc: Style fixes for mmu_helper.c target/ppc: Style fixes for mmu-hash64.[ch] target/ppc: Style fixes for mmu-hash32.[ch] target/ppc: Style fixes for misc_helper.c ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-04-26Merge remote-tracking branch ↵Peter Maydell1-2/+13
'remotes/ehabkost/tags/machine-next-pull-request' into staging Machine queue, 2019-04-25 * 4.1 machine-types (Cornelia Huck) * Support MAP_SYNC on pmem memory backends (Zhang Yi) * -cpu parsing fixes and cleanups (Eduardo Habkost) * machine initialization cleanups (Wei Yang, Markus Armbruster) # gpg: Signature made Thu 25 Apr 2019 18:54:57 BST # gpg: using RSA key 2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: util/mmap-alloc: support MAP_SYNC in qemu_ram_mmap() linux-headers: add linux/mman.h. scripts/update-linux-headers: add linux/mman.h util/mmap-alloc: Add a 'is_pmem' parameter to qemu_ram_mmap cpu: Fix crash with empty -cpu option cpu: Rename parse_cpu_model() to parse_cpu_option() vl: Simplify machine_parse() vl: Clean up after previous commit vl.c: allocate TYPE_MACHINE list once during bootup vl.c: make find_default_machine() local hw: add compat machines for 4.1 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-04-26ppc/hash64: Rework R and C bit updatesBenjamin Herrenschmidt2-10/+44
With MT-TCG, we are now running translation in a racy way, thus we need to mimic hardware when it comes to updating the R and C bits, by doing byte stores. The current "store_hpte" abstraction is ill suited for this, we replace it with two separate callbacks for setting R and C. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190411080004.8690-4-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-04-26ppc/spapr: Use proper HPTE accessors for H_READBenjamin Herrenschmidt1-6/+5
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190411080004.8690-3-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-04-26spapr: Drop duplicate PCI swizzle codeGreg Kurz1-20/+4
LSI mapping in spapr currently open-codes standard PCI swizzling. It thus duplicates the code of pci_swizzle_map_irq_fn(). Expose the swizzling formula so that it can be used with a slot number when building the device tree. Simply drop pci_spapr_map_irq() and call pci_swizzle_map_irq_fn() instead. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <155448184841.8446.13959787238854054119.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-04-26spapr_pci: Get rid of duplicate code for node name creationGreg Kurz1-4/+1
According to the changelog of 298a971024534, SpaprPhbState::dtbusname was introduced to "make it easier to relate the guest and qemu views of memory to each other", hence its name. Use it when creating the PHB node to avoid code duplication. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <155448184292.8446.8225650773162648595.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-04-26spapr/irq: remove spapr_ics_create()Cédric Le Goater1-30/+14
spapr_ics_create() is only called once. Merge it in spapr_irq_init_xics() and simplify a bit the error handling by using 'error_fatal' . Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190321144914.19934-13-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-04-26spapr/rtas: modify spapr_rtas_register() to remove RTAS handlersCédric Le Goater1-1/+1
Removing RTAS handlers will become necessary when the new pseries machine supporting multiple interrupt mode is introduced. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190321144914.19934-9-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-04-26hw/ppc/prep: Drop useless inclusion of "hw/input/i8042.h"Philippe Mathieu-Daudé1-1/+0
In commit 47973a2dbf we split the last generic chipset out of the PC board, but missed to remove the i8042 keyboard controller. This omission was later fixed in commit 7cb00357c1, but here we forgot to remove the "i8042.h" include. Do it now. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190316201528.9140-1-philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
generated by cgit v1.1 at 2025-09-24 13:23:35 +0000