aboutsummaryrefslogtreecommitdiff
path: root/hw/ppc/pnv.c
AgeCommit message (Expand)AuthorFilesLines
2020-05-27ppc/spapr: Add hotremovable flag on DIMM LMBs on drmem_v2Leonardo Bras1-4/+4
2020-05-27ppc/pnv: Fix NMI system reset SRR1 valueNicholas Piggin1-6/+20
2020-05-15qom: Drop parameter @errp of object_property_add() & friendsMarkus Armbruster1-8/+5
2020-05-15qom: Drop object_property_set_description() parameter @errpMarkus Armbruster1-2/+1
2020-05-07ppc/pnv: Add support for NMI interfaceNicholas Piggin1-0/+29
2020-04-07ppc/pnv: Create BMC devices only when defaults are enabledCédric Le Goater1-5/+27
2020-02-25Merge tag 'patchew/20200219160953.13771-1-imammedo@redhat.com' of https://git...Paolo Bonzini1-6/+2
2020-02-21ppc: free 'fdt' after reset the machinePan Nengyuan1-0/+2
2020-02-19ppc/pnv: use memdev for RAMIgor Mammedov1-6/+2
2020-02-02ppc/pnv: Add models for POWER8 PHB3 PCIe Host bridgeCédric Le Goater1-2/+67
2020-02-02ppc/pnv: Add models for POWER9 PHB4 PCIe Host bridgeBenjamin Herrenschmidt1-0/+107
2020-02-02ppc/pnv: Add support for "hostboot" modeCédric Le Goater1-1/+27
2020-01-24qdev: set properties with device_class_set_props()Marc-André Lureau1-1/+1
2020-01-08pnv/xive: Deduce the PnvXive pointer from XiveTCTX::xptrGreg Kurz1-14/+0
2020-01-08xive: Add a "presenter" link property to the TCTX objectCédric Le Goater1-1/+2
2020-01-08ppc/pnv: Add a "pnor" const link property to the BMC internal simulatorGreg Kurz1-1/+1
2020-01-08ppc/pnv: Add an "nr-threads" property to the base chip classGreg Kurz1-3/+5
2020-01-08spapr, pnv, xive: Add a "xive-fabric" link to the XIVE routerGreg Kurz1-0/+6
2020-01-08ppc/pnv: Introduce a "xics" property under the POWER8 chipCédric Le Goater1-5/+19
2020-01-08ppc/pnv: Introduce a "xics" property alias under the PSI modelCédric Le Goater1-2/+2
2020-01-08ppc/pnv: Drop "num-chips" machine propertyGreg Kurz1-50/+12
2020-01-08ppc/pnv: Modify the powerdown notifier to get the PowerNV machineCédric Le Goater1-1/+1
2019-12-17ppc/pnv: Drop PnvChipClass::typeGreg Kurz1-5/+0
2019-12-17ppc/pnv: Introduce PnvChipClass::xscom_pcba() methodGreg Kurz1-0/+23
2019-12-17ppc/pnv: Pass content of the "compatible" property to pnv_dt_xscom()Greg Kurz1-3/+9
2019-12-17ppc/pnv: Pass XSCOM base address and address size to pnv_dt_xscom()Greg Kurz1-3/+9
2019-12-17ppc/pnv: Introduce PnvChipClass::xscom_core_base() methodGreg Kurz1-7/+24
2019-12-17ppc/pnv: Introduce PnvChipClass::intc_print_info() methodGreg Kurz1-5/+25
2019-12-17ppc/pnv: Introduce PnvMachineClass::dt_power_mgt()Greg Kurz1-4/+6
2019-12-17ppc/pnv: Introduce PnvMachineClass and PnvMachineClass::compatGreg Kurz1-14/+18
2019-12-17ppc/pnv: Fix OCC common area region mappingCédric Le Goater1-2/+2
2019-12-17ppc/pnv: Introduce PBA registersCédric Le Goater1-2/+10
2019-12-17ppc/pnv: add a LPC Controller model for POWER10Cédric Le Goater1-3/+22
2019-12-17ppc/pnv: add a PSI bridge model for POWER10Cédric Le Goater1-7/+20
2019-12-17ppc/pnv: Introduce a POWER10 PnvChip and a powernv10 machineCédric Le Goater1-6/+152
2019-12-17ppc/pnv: Clarify how the TIMA is accessed on a multichip systemCédric Le Goater1-0/+14
2019-12-17ppc/pnv: Implement the XiveFabric interfaceCédric Le Goater1-0/+35
2019-12-17ppc/pnv: Fix TIMA indirect accessCédric Le Goater1-0/+17
2019-12-17ppc/pnv: Instantiate cores separatelyGreg Kurz1-18/+12
2019-12-17ppc/pnv: Create BMC devices at machine initCédric Le Goater1-17/+16
2019-12-17ppc/pnv: Add HIOMAP commandsCédric Le Goater1-0/+1
2019-12-17ppc/pnv: Link "chip" property to PnvXive::chip pointerGreg Kurz1-2/+2
2019-12-17ppc/pnv: Link "chip" property to PnvCore::chip pointerGreg Kurz1-2/+2
2019-12-17ppc/pnv: Link "chip" property to PnvHomer::chip pointerGreg Kurz1-4/+4
2019-12-17ppc/pnv: Link "psi" property to PnvOCC::psi pointerGreg Kurz1-4/+4
2019-12-17ppc/pnv: Link "psi" property to PnvLpc::psi pointerGreg Kurz1-4/+4
2019-12-17ppc/pnv: Drop "chip" link from POWER9 PSI objectGreg Kurz1-2/+0
2019-12-17ppc/pnv: Add a "/qemu" device tree nodeCédric Le Goater1-0/+3
2019-12-17ppc/pnv: Add a PNOR modelCédric Le Goater1-0/+14
2019-11-18ppc: Add intc_destroy() handlers to SpaprInterruptController/PnvChipGreg Kurz1-0/+21
generated by cgit v1.1 at 2024-09-11 20:03:39 +0000