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hw
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pci-bridge
Age
Commit message (
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Author
Files
Lines
2024-04-25
Merge tag 'hw-misc-20240425' of https://github.com/philmd/qemu into staging
Richard Henderson
1
-2
/
+1
2024-04-25
hw/cxl/cxl-cdat: Make cxl_doe_cdat_init() return boolean
Zhao Liu
1
-2
/
+1
2024-04-25
hw, target: Add ResetType argument to hold and exit phase methods
Peter Maydell
2
-3
/
+3
2024-03-13
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu ...
Peter Maydell
1
-1
/
+1
2024-03-12
hw/pci-bridge/cxl_upstream: Fix missing ERRP_GUARD() in cxl_usp_realize()
Zhao Liu
1
-0
/
+1
2024-03-12
hw/pci-bridge/pxb-cxl: Drop RAS capability from host bridge.
Jonathan Cameron
1
-1
/
+1
2024-03-12
bulk: Access existing variables initialized to &S->F when available
Philippe Mathieu-Daudé
1
-1
/
+1
2024-03-12
hw/pci-bridge/cxl_upstream: Fix missing ERRP_GUARD() in cxl_usp_realize()
Zhao Liu
1
-0
/
+1
2024-03-09
hw/pci-bridge/cxl_upstream: Fix problem with g_steal_pointer()
Thomas Huth
1
-4
/
+4
2024-02-14
hw/cxl: Standardize all references on CXL r3.1 and minor updates
Jonathan Cameron
3
-6
/
+6
2024-02-14
hw/pci-bridge/cxl_upstream: Drop g_malloc() failure handling
Jonathan Cameron
1
-6
/
+0
2024-01-04
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
Peter Maydell
1
-2
/
+0
2023-12-31
meson: remove CONFIG_ALL
Paolo Bonzini
1
-2
/
+0
2023-12-30
hw/pci-bridge: Constify VMState
Richard Henderson
7
-7
/
+7
2023-11-07
hw/pci-bridge/cxl_downstream: Set default link width and link speed
Jonathan Cameron
1
-0
/
+14
2023-11-07
hw/cxl/mbox: Add Physical Switch Identify command.
Jonathan Cameron
1
-3
/
+1
2023-11-07
hw/pci-bridge/cxl_upstream: Move defintion of device to header.
Jonathan Cameron
1
-10
/
+1
2023-11-07
hw/cxl: CXLDVSECPortExtensions renamed to CXLDVSECPortExt
Jonathan Cameron
3
-3
/
+3
2023-10-04
hw/pci-bridge/cxl-upstream: Add serial number extended capability support
Jonathan Cameron
1
-2
/
+13
2023-09-21
hw/pci-bridge/cxl_upstream: Fix bandwidth entry base unit for SSLBIS
Dave Jiang
1
-1
/
+1
2023-09-20
hw/pci: spelling fixes
Michael Tokarev
2
-2
/
+2
2023-08-03
hw/pci-bridge/cxl_upstream.c: Use g_new0() in build_cdat_table()
Peter Maydell
1
-4
/
+1
2023-06-20
meson: Replace softmmu_ss -> system_ss
Philippe Mathieu-Daudé
1
-2
/
+2
2023-05-19
hw/pci-bridge: make building pcie-to-pci bridge configurable
Sebastian Ott
2
-1
/
+7
2023-05-19
hw/cxl: cdat: Fix failure to free buffer in erorr paths
Jonathan Cameron
1
-0
/
+3
2023-04-24
hw/pci-bridge: Make PCIe and CXL PXB Devices inherit from TYPE_PXB_DEV
Jonathan Cameron
1
-40
/
+19
2023-04-24
hw/pci-bridge: pci_expander_bridge fix type in pxb_cxl_dev_reset()
Jonathan Cameron
1
-1
/
+1
2023-03-07
hw/pxb-cxl: Support passthrough HDM Decoders unless overridden
Jonathan Cameron
1
-5
/
+39
2023-03-07
hw/pci-bridge/cxl_root_port: Wire up MSI
Jonathan Cameron
1
-0
/
+61
2023-03-07
hw/pci-bridge/cxl_root_port: Wire up AER
Jonathan Cameron
1
-0
/
+3
2023-03-02
hw/pci-bridge/cxl_downstream: Fix type naming mismatch
Jonathan Cameron
1
-1
/
+1
2023-02-27
hw: Move ich9.h to southbridge/
Bernhard Beschow
1
-1
/
+1
2023-01-28
pci: acpi hotplug: rename x-native-hotplug to x-do-not-expose-native-hotplug-cap
Igor Mammedov
1
-1
/
+6
2023-01-28
pci_bridge: remove whitespace
Igor Mammedov
1
-1
/
+0
2023-01-18
bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx
Philippe Mathieu-Daudé
1
-1
/
+1
2023-01-08
include/hw/cxl: Move typedef PXBDev to cxl.h, and put it to use
Markus Armbruster
1
-1
/
+0
2023-01-08
include/hw/pci: Break inclusion loop pci_bridge.h and cxl.h
Markus Armbruster
1
-1
/
+1
2022-12-21
pci: drop redundant PCIDeviceClass::is_bridge field
Igor Mammedov
9
-9
/
+0
2022-12-21
remove DEC 21154 PCI bridge
Igor Mammedov
3
-175
/
+0
2022-12-16
pci: Convert child classes of TYPE_PCIE_ROOT_PORT to 3-phase reset
Peter Maydell
1
-5
/
+9
2022-12-16
pci: Convert TYPE_PCIE_ROOT_PORT to 3-phase reset
Peter Maydell
1
-3
/
+5
2022-11-07
hw/pci-bridge/cxl-upstream: Add a CDAT table access DOE
Jonathan Cameron
1
-1
/
+194
2022-06-16
pci-bridge/cxl_downstream: Add a CXL switch downstream port
Jonathan Cameron
2
-1
/
+250
2022-06-16
pci-bridge/cxl_upstream: Add a CXL switch upstream port
Jonathan Cameron
2
-1
/
+217
2022-06-09
pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup.
Jonathan Cameron
3
-13
/
+38
2022-06-09
hw/cxl: Make the CXL fixed memory window setup a machine parameter.
Jonathan Cameron
1
-1
/
+1
2022-05-13
CXL/cxl_component: Add cxl_get_hb_cstate()
Jonathan Cameron
1
-0
/
+7
2022-05-13
acpi/cxl: Create the CEDT (9.14.1)
Ben Widawsky
1
-17
/
+0
2022-05-13
hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142)
Ben Widawsky
1
-7
/
+59
2022-05-13
hw/cxl/rp: Add a root port
Ben Widawsky
4
-1
/
+247
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