| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2024-02-14 | hw/cxl: Standardize all references on CXL r3.1 and minor updates | Jonathan Cameron | 1 | -2/+2 |
| 2023-11-07 | hw/pci-bridge/cxl_downstream: Set default link width and link speed | Jonathan Cameron | 1 | -0/+14 |
| 2023-11-07 | hw/cxl/mbox: Add Physical Switch Identify command. | Jonathan Cameron | 1 | -3/+1 |
| 2023-11-07 | hw/cxl: CXLDVSECPortExtensions renamed to CXLDVSECPortExt | Jonathan Cameron | 1 | -1/+1 |
| 2023-09-20 | hw/pci: spelling fixes | Michael Tokarev | 1 | -1/+1 |
| 2023-03-02 | hw/pci-bridge/cxl_downstream: Fix type naming mismatch | Jonathan Cameron | 1 | -1/+1 |
| 2022-12-21 | pci: drop redundant PCIDeviceClass::is_bridge field | Igor Mammedov | 1 | -1/+0 |
| 2022-06-16 | pci-bridge/cxl_downstream: Add a CXL switch downstream port | Jonathan Cameron | 1 | -0/+249 |
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