| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2024-04-25 | hw, target: Add ResetType argument to hold and exit phase methods | Peter Maydell | 1 | -5/+5 |
| 2024-03-26 | hw/misc/stm32l4x5_rcc: Propagate period when enabling a clock | Arnaud Minier | 1 | -1/+1 |
| 2024-03-26 | hw/misc/stm32l4x5_rcc: Inline clock_update() in clock_mux_update() | Philippe Mathieu-Daudé | 1 | -1/+6 |
| 2024-03-05 | hw/misc/stm32l4x5_rcc: Add write protections to CR register | Arnaud Minier | 1 | -50/+114 |
| 2024-03-05 | hw/misc/stm32l4x5_rcc: Handle Register Updates | Arnaud Minier | 1 | -12/+512 |
| 2024-03-05 | hw/misc/stm32l4x5_rcc: Initialize PLLs and clock multiplexers | Arnaud Minier | 1 | -17/+128 |
| 2024-03-05 | hw/misc/stm32l4x5_rcc: Add an internal PLL Clock object | Arnaud Minier | 1 | -0/+176 |
| 2024-03-05 | hw/misc/stm32l4x5_rcc: Add an internal clock multiplexer object | Arnaud Minier | 1 | -0/+160 |
| 2024-03-05 | hw/misc/stm32l4x5_rcc: Implement STM32L4x5_RCC skeleton | Arnaud Minier | 1 | -0/+446 |
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