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AgeCommit message (Expand)AuthorFilesLines
2017-09-27macio: use object link between MACIO_IDE and MAC_DBDMA objectMark Cave-Ayland1-1/+2
2017-09-27macio: pass channel into MACIOIDEState via qdev propertyMark Cave-Ayland1-1/+3
2017-09-27mac_dbdma: remove DBDMA_init() functionMark Cave-Ayland2-18/+12
2017-09-27mac_dbdma: QOMifyMark Cave-Ayland1-10/+49
2017-09-27mac_dbdma: remove unused IO fields from DBDMAStateMark Cave-Ayland1-2/+0
2017-09-27ppc/mac: More rework of the DBDMA emulationBenjamin Herrenschmidt1-52/+139
2017-05-23shutdown: Add source information to SHUTDOWN and RESETEric Blake1-2/+2
2016-09-07ppc: Fix macio ESCC legacy mappingBenjamin Herrenschmidt1-16/+10
2016-07-18dbdma: reset io->processing flag for unassigned DBDMA channel rw accessesMark Cave-Ayland1-0/+1
2016-07-18dbdma: set FLUSH bit upon reception of flush command for unassigned DBDMA cha...Mark Cave-Ayland1-0/+10
2016-07-18dbdma: fix load_word/store_word value endiannessMark Cave-Ayland1-19/+5
2016-07-18dbdma: fix endian of DBDMA_CMDPTR_LO during branchMark Cave-Ayland1-1/+1
2016-07-18dbdma: add per-channel debugging enabled via DEBUG_DBDMA_CHANMASKMark Cave-Ayland1-33/+42
2016-07-18dbdma: always define DBDMA_DPRINTF and enable debug with DEBUG_DBDMAMark Cave-Ayland1-8/+7
2016-06-07dbdma: use DMA memory interface for memory accessesMark Cave-Ayland1-6/+7
2016-05-19hw: explicitly include qemu/log.hPaolo Bonzini2-0/+2
2016-04-19cuda: fix off-by-one error in SET_TIME commandAurelien Jarno1-2/+2
2016-03-22util: move declarations out of qemu-common.hVeronia Bahaa1-0/+1
2016-03-22Replaced get_tick_per_sec() by NANOSECONDS_PER_SECONDRutuja Shah2-9/+9
2016-03-22include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster1-0/+1
2016-02-28dbdma: warn when using unassigned channelHervé Poussineau1-2/+23
2016-02-17cuda: remove CUDA_GET_SET_IIC/CUDA_COMBINED_FORMAT_IIC commandsHervé Poussineau1-23/+0
2016-02-17cuda: remove GET_6805_ADDR commandHervé Poussineau1-3/+0
2016-02-17cuda: port SET_TIME command to new frameworkHervé Poussineau1-6/+18
2016-02-17cuda: port GET_TIME command to new frameworkHervé Poussineau1-8/+21
2016-02-17cuda: port SET_POWER_MESSAGES command to new frameworkHervé Poussineau1-3/+16
2016-02-17cuda: port FILE_SERVER_FLAG command to new frameworkHervé Poussineau1-1/+16
2016-02-17cuda: port RESET_SYSTEM command to new frameworkHervé Poussineau1-4/+13
2016-02-17cuda: port POWERDOWN command to new frameworkHervé Poussineau1-4/+13
2016-02-17cuda: port SET_DEVICE_LIST command to new frameworkHervé Poussineau1-2/+16
2016-02-17cuda: port SET_AUTO_RATE command to new frameworkHervé Poussineau1-6/+30
2016-02-17cuda: port AUTOPOLL command to new frameworkHervé Poussineau1-15/+25
2016-02-17cuda: move unknown commands reject out of switchHervé Poussineau1-14/+16
2016-02-17cuda: add a framework to handle commandsHervé Poussineau1-0/+34
2016-01-30cuda.c: return error for unknown commandsAlyssa Milburn1-0/+5
2016-01-30cuda: add missing fields to VMStateDescriptionMark Cave-Ayland1-2/+5
2016-01-30mac_dbdma: add DBDMA controller state to VMStateDescriptionMark Cave-Ayland1-4/+36
2016-01-29ppc: Clean up includesPeter Maydell3-0/+3
2015-11-30mac_dbdma: always initialize channel field in DBDMA_channelHervé Poussineau1-1/+1
2015-11-12cuda.c: add delay to setting of SR_INT bitMark Cave-Ayland1-11/+33
2015-11-12cuda.c: fix T2 timer and enable its interruptMark Cave-Ayland1-9/+24
2015-11-12cuda.c: rename get_counter() state variable from s to ti for consistencyMark Cave-Ayland1-9/+9
2015-11-12cuda.c: refactor get_tb() so that the time can be passed inMark Cave-Ayland1-5/+6
2015-11-12cuda.c: add defines for CUDA registersMark Cave-Ayland1-34/+53
2015-11-12cuda.c: fix CUDA SR interrupt clearingMark Cave-Ayland1-1/+3
2015-11-12cuda.c: implement dummy IIC access commandsMark Cave-Ayland1-0/+18
2015-11-12cuda.c: implement simple CUDA_GET_6805_ADDR commandMark Cave-Ayland1-0/+3
2015-11-12cuda.c: fix CUDA_PACKET response packet formatMark Cave-Ayland1-19/+5
2015-11-12cuda.c: fix CUDA ADB error packet formatMark Cave-Ayland1-2/+4
2015-10-23macio: add to bridge categoryLaurent Vivier1-0/+1
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