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2024-07-02hw: skip registration of outdated versioned machine typesDaniel P. Berrangé1-0/+1
This calls the MACHINE_VER_DELETION() macro in the machine type registration method, so that when a versioned machine type reaches the end of its life, it is no longer registered with QOM and thus cannot be used. The actual definition of the machine type should be deleted at this point, but experience shows that can easily be forgotten. By skipping registration the manual code deletion task can be done at any later date. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240620165742.1711389-12-berrange@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-07-02hw: set deprecation info for all versioned machine typesDaniel P. Berrangé1-0/+1
This calls the MACHINE_VER_DEPRECATION() macro in the definition of all machine type classes which support versioning. This ensures that they will automatically get deprecation info set when they reach the appropriate point in their lifecycle. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240620165742.1711389-11-berrange@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-07-02hw/m68k: convert 'virt' machine definitions to use new macrosDaniel P. Berrangé1-22/+29
This changes the DEFINE_VIRT_MACHINE macro to use the common helpers for constructing versioned symbol names and strings, bringing greater consistency across targets. A DEFINE_VIRT_MACHINE_AS_LATEST helper is added so that it is not required to pass 'false' for every single historical machine type. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240620165742.1711389-6-berrange@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-05-03m68k: switch boards to "default y"Paolo Bonzini1-0/+10
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with m68k. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-04-25hw, target: Add ResetType argument to hold and exit phase methodsPeter Maydell1-1/+1
We pass a ResetType argument to the Resettable class enter phase method, but we don't pass it to hold and exit, even though the callsites have it readily available. This means that if a device cared about the ResetType it would need to record it in the enter phase method to use later on. Pass the type to all three of the phase methods to avoid having to do that. Commit created with for dir in hw target include; do \ spatch --macro-file scripts/cocci-macro-file.h \ --sp-file scripts/coccinelle/reset-type.cocci \ --keep-comments --smpl-spacing --in-place \ --include-headers --dir $dir; done and no manual edits. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Luc Michel <luc.michel@amd.com> Message-id: 20240412160809.1260625-5-peter.maydell@linaro.org
2024-04-18hw: Add compat machines for 9.1Paolo Bonzini1-1/+8
Add 9.1 machine types for arm/i440fx/m68k/q35/s390x/spapr. Reviewed-by: Cornelia Huck <cohuck@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Cc: Gavin Shan <gshan@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-03-11virt: set the CPU type in BOOTINFOLaurent Vivier1-3/+14
BI_CPUTYPE/BI_MMUTYPE/BI_FPUTYPE were statically assigned to the 68040 information. This patch changes the code to set in bootinfo the information provided by the command line '-cpu' parameter. Bug: https://gitlab.com/qemu-project/qemu/-/issues/2091 Reported-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20240223155742.2790252-1-laurent@vivier.eu>
2024-03-09hw/m68k/mcf5208: add support for resetAngelo Dureghello1-2/+42
Add reset support for mcf5208. Signed-off-by: Angelo Dureghello <angelo@kernel-space.org> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20240309093459.984565-1-angelo@kernel-space.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-02hw/m68k/q800: use qemu_find_nic_info()David Woodhouse1-13/+16
If a corresponding NIC configuration was found, it will have a MAC address already assigned, so use that. Else, generate and assign a default one. Using qemu_find_nic_info() is simpler than the alternative of using qemu_configure_nic_device() and then having to fetch the "mac" property as a string and convert it. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
2024-02-02hw/m68k/mcf5208: use qemu_create_nic_device()David Woodhouse1-13/+6
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
2024-01-11q800: move dp8393x_prom memory region to Q800MachineStateMark Cave-Ayland1-4/+3
There is no need to dynamically allocate the memory region from the heap. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20231227210212.245106-1-mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-01-05hw/m68k/mcf5206: Embed m5206_timer_state in m5206_mbar_stateThomas Huth1-12/+8
There's no need to explicitely allocate the memory here, we can simply embed it into the m5206_mbar_state instead. Signed-off-by: Thomas Huth <huth@tuxfamily.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231221122939.11001-1-huth@tuxfamily.org>
2023-12-30hw/m68k: Constify VMStateRichard Henderson2-3/+3
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231221031652.119827-40-richard.henderson@linaro.org>
2023-12-22next-cube.c: move machine MemoryRegions into NeXTStateMark Cave-Ayland1-17/+21
These static memory regions are contained within the machine and do not need to be dynamically allocated. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20231220131641.592826-12-mark.cave-ayland@ilande.co.uk> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-12-22next-cube.c: remove val and size arguments from nextscr2_write()Mark Cave-Ayland1-11/+6
These are now redundant with the scr2 and old_scr2 fields in NeXTPC. Rename the function from nextscr2_write() to next_scr2_rtc_update() to better reflect its purpose. At the same time replace the manual bit manipulation with the extract32() and deposit32() functions. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20231220131641.592826-11-mark.cave-ayland@ilande.co.uk> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-12-22next-cube.c: move LED logic to new next_scr2_led_update() functionMark Cave-Ayland1-9/+13
Ensure that the LED status is updated by calling next_scr2_led_update() whenever the SC2 register is written. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20231220131641.592826-10-mark.cave-ayland@ilande.co.uk> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-12-22next-cube.c: move static old_scr2 variable to NeXTPCMark Cave-Ayland1-3/+9
Move the old_scr2 variable to NeXTPC so that the old SCR2 register state is stored along with the current SCR2 state. Since the SCR2 register is 32-bits wide, convert old_scr2 to uint32_t and update the SCR2 register access code to allow unaligned writes. Note that this is a migration break, but as nothing will currently boot then we do not need to worry about this now. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20231220131641.592826-9-mark.cave-ayland@ilande.co.uk> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-12-22next-cube.c: move static phase variable to NextRtcMark Cave-Ayland1-15/+16
The phase variable represents part of the state machine used to clock data out of the NextRtc device. Note that this is a migration break for the NeXTRtc struct, but as nothing will currently boot then we simply bump the migration version for now. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20231220131641.592826-8-mark.cave-ayland@ilande.co.uk> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-12-22next-cube.c: move static led variable to NeXTPCMark Cave-Ayland1-6/+7
The state of the led is stored in the SCR2 register which is part of the NeXTPC device. Note that this is a migration break for the NeXTPC device, but as nothing will currently boot then we simply bump the migration version for now. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20231220131641.592826-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-12-22next-cube.c: update and improve dma_opsMark Cave-Ayland1-37/+63
Rename dma_ops to next_dma_ops and the read/write functions to next_dma_read() and next_dma_write() respectively, mark next_dma_ops as DEVICE_BIG_ENDIAN and also improve the consistency of the val variable in next_dma_read() and next_dma_write(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20231220131641.592826-6-mark.cave-ayland@ilande.co.uk> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-12-22next-cube.c: update scr_ops to properly use modern memory APIMark Cave-Ayland1-100/+55
The old QEMU memory accessors used in the original NextCube patch series had separate functions for 1, 2 and 4 byte accessors. When the series was finally merged a simple wrapper function was written to dispatch the memory accesses using the original functions. Convert scr_ops to use the memory API directly renaming it to next_scr_ops, marking it as DEVICE_BIG_ENDIAN, and handling any unaligned accesses. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20231220131641.592826-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-12-22next-cube.c: update mmio_ops to properly use modern memory APIMark Cave-Ayland1-111/+45
The old QEMU memory accessors used in the original NextCube patch series had separate functions for 1, 2 and 4 byte accessors. When the series was finally merged a simple wrapper function was written to dispatch the memory accesses using the original functions. Convert mmio_ops to use the memory API directly renaming it to next_mmio_ops, marking it as DEVICE_BIG_ENDIAN, and handling any unaligned accesses. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20231220131641.592826-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-12-22next-cube.c: don't pulse SCSI DMA IRQ upon reception of FLUSH commandMark Cave-Ayland1-1/+0
Normally a DMA FLUSH command is used to ensure that data is completely written to the device and/or memory, so remove the pulse of the SCSI DMA IRQ if a DMA FLUSH command is received. This enables the NeXT ROM monitor to start to load from a SCSI disk. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20231220131641.592826-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-12-22next-cube.c: add dummy Ethernet register to allow diagnostic to timeoutMark Cave-Ayland1-0/+4
Add a dummy register at address 0x6000 in the MMIO memory region to allow the initial diagnostic test to timeout rather than getting stuck in a loop continuously writing "en_write: tx not ready" to the console. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20231220131641.592826-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-12-20hw: Add compat machines for 9.0Cornelia Huck1-1/+8
Add 9.0 machine types for arm/i440fx/m68k/q35/s390x/spapr. Signed-off-by: Cornelia Huck <cohuck@redhat.com> Message-ID: <20231120094259.1191804-1-cohuck@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Reviewed-by: Gavin Shan <gshan@redhat.com> Acked-by: Eric Farman <farman@linux.ibm.com> # s390x Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-20hw/core/machine: Constify MachineClass::valid_cpu_types[]Gavin Shan1-6/+5
Constify MachineClass::valid_cpu_types[i], as suggested by Richard Henderson. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231117071704.35040-2-philmd@linaro.org [PMD: Constify HPPA machines, restrict valid_cpu_types to machine_class_init() handlers] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-02m68k: Instantiate the ESP SCSI controller for the NeXTcube machineThomas Huth1-7/+110
The NeXTcube uses a NCR 53C90 SCSI interface for its disks, so we should be able to use the ESP controller from QEMU here. The code here has been basically taken from Bryce Lanham's GSoC 2011 contribution, except for the next_scsi_init() function which has been rewritte as a replacement for the esp_init() function (that has been removed quite a while ago). Note that SCSI is not working yet. The ESP code likely needs some more fixes first and there still might be some bugs left in they way we wire it up for the NeXT-Cube machine. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20230930132351.30282-4-huth@tuxfamily.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-11-01hw/m68k/next-cube: Mirror BIOS to address 0Thomas Huth1-1/+3
The ROM is also available at address 0, so add a proper mirror for this address. Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20230930132351.30282-2-huth@tuxfamily.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-11-01hw/char/mcf_uart: Have mcf_uart_create() return DeviceStatePhilippe Mathieu-Daudé2-6/+6
There is no point in having mcf_uart_init() demote the DeviceState pointer and return a void one. Directly return the real typedef. mcf_uart_init() do both init + realize: rename as mcf_uart_create(). Similarly, mcf_uart_mm_init() do init / realize / mmap: rename as mcf_uart_create_mmap(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231019104929.16517-1-philmd@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-11-01hw/m68k/virt: Do not open-code sysbus_create_simple()Philippe Mathieu-Daudé1-5/+2
Mechanical change using the following coccinelle script: @@ identifier dev; expression qom_type; expression addr; expression irq; @@ - dev = qdev_new(qom_type); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); - sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); + dev = sysbus_create_simple(qom_type, addr, irq); Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20231024083010.12453-7-philmd@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-11-01hw/m68k/next-cube: Do not open-code sysbus_create_simple()Philippe Mathieu-Daudé1-7/+2
Mechanical change using the following coccinelle script: @@ identifier dev; identifier sbd; expression qom_type; expression addr; @@ - dev = qdev_new(qom_type); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); + dev = sysbus_create_simple(qom_type, addr, NULL); then manually removing the 'dev' variable to avoid: error: variable 'dev' set but not used [-Werror,-Wunused-but-set-variable] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20231024083010.12453-6-philmd@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-11-01hw/m68k/mcf_intc: Pass CPU using QOM link propertyPhilippe Mathieu-Daudé1-6/+11
QOM objects shouldn't access each other internals fields except using the QOM API. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Thomas Huth <huth@tuxfamily.org> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20231024083010.12453-5-philmd@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-11-01hw/m68k/mcf_intc: Expose MMIO region via SysBus APIPhilippe Mathieu-Daudé1-1/+3
QOM objects shouldn't access each other internals fields except using the QOM API. Here the caller of mcf_intc_init() access the MMIO region from the MCF_INTC state. Avoid that by exposing that region via sysbus_init_mmio(), then get it with sysbus_mmio_get_region(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Thomas Huth <huth@tuxfamily.org> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20231024083010.12453-4-philmd@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-11-01hw/m68k/mcf5206: Pass CPU using QOM link propertyPhilippe Mathieu-Daudé2-3/+12
Avoid the interrupt controller directly access the first cpu via the qemu_get_cpu() call. Pass it as argument to mcf5206_init() from the board code. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231024083010.12453-3-philmd@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-11-01hw/m68k/irqc: Pass CPU using QOM link propertyPhilippe Mathieu-Daudé1-0/+2
Avoid the interrupt controller directly access the 'first_cpu' global. Pass 'cpu' from the board code. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231024083010.12453-2-philmd@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2023-10-06q800: add alias for MacOS toolbox ROM at 0x40000000Mark Cave-Ayland1-0/+5
According to the Apple Quadra 800 Developer Note document, the Quadra 800 ROM consists of 2 ROM code sections based at offsets 0x0 and 0x800000. A/UX attempts to access the toolbox ROM at the lower offset during startup, so provide a memory alias to allow the access to succeed. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20231004083806.757242-20-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-10-06q800: add ESCC alias at 0xc000Mark Cave-Ayland1-0/+6
Tests on real Q800 hardware show that the ESCC is addressable at multiple locations within the ESCC memory region - at least 0xc000, 0xc020 (as expected by the MacOS toolbox ROM) and 0xc040. All released NetBSD kernels before 10 use the 0xc000 address which causes a fatal error when running the MacOS booter. Add a single memory region alias at 0xc000 to enable NetBSD kernels to start booting under QEMU. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20231004083806.757242-19-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-10-06q800: add easc bool machine class property to switch between ASC and EASCMark Cave-Ayland1-1/+29
This determines whether the Apple Sound Chip (ASC) is set to enhanced mode (default) or to original mode. The real Q800 hardware used an EASC chip however a lot of older software only works with the older ASC chip. Adding this as a machine parameter allows QEMU to be used as an developer aid for testing and migrating code from ASC to EASC. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20231004083806.757242-11-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-10-06q800: add Apple Sound Chip (ASC) audio to machineMark Cave-Ayland2-1/+31
The Quadra 800 has the enhanced ASC (EASC) audio chip which supports both the legacy IRQ routing through VIA2 and also "A/UX" mode routing direct to the CPU. Co-developed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20231004083806.757242-10-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-10-06audio: add Apple Sound Chip (ASC) emulationMark Cave-Ayland1-0/+1
The Apple Sound Chip was primarily used by the Macintosh II to generate sound in hardware which was previously handled by the toolbox ROM with software interrupts. Implement both the standard ASC and also the enhanced ASC (EASC) functionality which is used in the Quadra 800. Note that whilst real ASC hardware uses AUDIO_FORMAT_S8, this implementation uses AUDIO_FORMAT_U8 instead because AUDIO_FORMAT_S8 is rarely used and not supported by some audio backends like PulseAudio and DirectSound when played directly with -audiodev out.mixing-engine=off. Co-developed-by: Laurent Vivier <laurent@vivier.eu> Co-developed-by: Volker Rümelin <vr_qemu@t-online.de> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20231004083806.757242-8-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-10-06q800: allow accesses to RAM area even if less memory is availableMark Cave-Ayland1-1/+29
MacOS attempts a series of writes and reads over the entire RAM area in order to determine the amount of RAM within the machine. Allow accesses to the entire RAM area ignoring writes and always reading zero for areas where there is no physical RAM installed to allow MacOS to detect the memory size without faulting. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20231004083806.757242-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-10-06q800: add IOSB subsystemMark Cave-Ayland2-0/+10
It is needed because it defines the BIOSConfig area. Co-developed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Message-ID: <20231004083806.757242-6-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-10-06q800: add machine id registerMark Cave-Ayland1-0/+29
MacOS reads this address to identify the hardware. This is a basic implementation returning the ID of Quadra 800. Details: http://mess.redump.net/mess/driver_info/mac_technical_notes "There are 3 ID schemes [...] The third and most scalable is a machine ID register at 0x5ffffffc. The top word must be 0xa55a to be valid. Then bits 15-11 are 0 for consumer Macs, 1 for portables, 2 for high-end 68k, and 3 for high-end PowerPC. Bit 10 is 1 if additional ID bits appear elsewhere (e.g. in VIA1). The rest of the bits are a per-model identifier. Model Lower 16 bits of ID ... Quadra/Centris 610/650/800 0x2BAD" Co-developed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231004083806.757242-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-10-06q800: add djMEMC memory controllerMark Cave-Ayland2-0/+11
The djMEMC controller is used to store information related to the physical memory configuration. Co-developed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231004083806.757242-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-10-06q800-glue.c: convert to Resettable interfaceMark Cave-Ayland1-3/+4
Convert the GLUE device to 3-phase reset. The legacy method doesn't do anything that's invalid in the hold phase, so the conversion is simple and not a behaviour change. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20231004083806.757242-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-09-29hw/m68k: Clean up local variable shadowingPhilippe Mathieu-Daudé1-6/+4
Fix: hw/m68k/virt.c:263:13: error: declaration shadows a local variable [-Werror,-Wshadow] BOOTINFOSTR(param_ptr, BI_COMMAND_LINE, ^ hw/m68k/bootinfo.h:47:13: note: expanded from macro 'BOOTINFOSTR' int i; \ ^ hw/m68k/virt.c:130:9: note: previous declaration is here int i; ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20230904161235.84651-13-philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2023-08-23hw: Add compat machines for 8.2Cornelia Huck1-1/+8
Add 8.2 machine types for arm/i440fx/m68k/q35/s390x/spapr. Signed-off-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20230718142235.135319-1-cohuck@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Acked-by: Laurent Vivier <laurent@vivier.eu> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-07-25other architectures: spelling fixesMichael Tokarev3-3/+3
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2023-06-22q800: move macfb device to Q800MachineStateMark Cave-Ayland1-2/+4
Also change the instantiation of the macfb device to use object_initialize_child(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230621085353.113233-23-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-06-22q800: don't access Nubus bus directly from the mac-nubus-bridge deviceMark Cave-Ayland1-1/+1
Instead use the qdev_get_child_bus() function which is intended for this exact purpose. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230621085353.113233-22-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
generated by cgit v1.1 at 2024-07-17 05:29:49 +0000