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2025-06-19hw/loongarch/virt: Add kernel irqchip supportBibo Mao1-24/+33
If kvm_irqchip_in_kernel() return true, interrupt controller ExtIOI, IPI, PCH_PCI and PCH_MSI should be emlated in kernel. And it is not necessary to create memory region for these devices in user space. Reviewed-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Bibo Mao <maobibo@loongson.cn> Message-ID: <20250606063607.2557540-1-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2025-06-19hw/loongarch/virt: Disable emulation with IOCSR misc registerBibo Mao1-0/+8
Register IOCSR MISC_FUNC_REG is to enable features about EXTIOI irqchip. If EXTIOI is emulated in kernel, MISC_FUNC_REG register should be emulated in kernel also. Reviewed-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Bibo Mao <maobibo@loongson.cn> Message-ID: <20250606063523.2557513-1-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2025-06-10hw/loongarch/virt: Remove global variables about memmap tablesBibo Mao2-19/+35
Global variables memmap_table and memmap_entries stores UEFI memory map table informations. It can be moved into structure LoongArchVirtMachineState. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20250430094738.1556670-3-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2025-06-10hw/loongarch/virt: Remove global variables about initrdBibo Mao1-11/+10
Global variables initrd_offset and initrd_size records loading information about initrd, it can be moved to structure loongarch_boot_info. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250430094738.1556670-2-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2025-06-10hw/loongarch/virt: inform guest of kvmQiang Ma1-0/+4
Commit bab27ea2e3 ("hw/arm/virt: smbios: inform guest of kvm") fixes the same issue on arm. without this patch: [root@localhost ~]# virt-what qemu with this patch: [root@localhost ~]# virt-what kvm Signed-off-by: Qiang Ma <maqianga@uniontech.com> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20250603031813.31794-1-maqianga@uniontech.com> Signed-off-by: Song Gao <gaosong@loongson.cn>
2025-06-10hw/loongarch/virt: Fix big endian support with MCFG tableBibo Mao1-2/+2
With API build_mcfg(), it is not necessary with parameter structure AcpiMcfgInfo to convert to little endian since it is directly used with host native endian. Here remove endian conversion before calling function build_mcfg(). With this patch, bios-tables-test passes to run on big endian host machine S390. Fixes: 735143f10d3e ("hw/loongarch: Add acpi ged support") Cc: qemu-stable@nongnu.org Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20250604065502.1114098-2-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2025-05-14hw/loongarch/boot: Adjust the loading position of the initrdXianglai Li1-9/+43
When only the -kernel parameter is used to load the elf kernel, the initrd is loaded in the ram. If the initrd size is too large, the loading fails, resulting in a VM startup failure. This patch first loads initrd near the kernel. When the nearby memory space of the kernel is insufficient, it tries to load it to the starting position of high memory. If there is still not enough, qemu will report an error and ask the user to increase the memory space for the virtual machine to boot. Signed-off-by: Xianglai Li <lixianglai@loongson.cn> Message-Id: <20250506080946.817092-1-lixianglai@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2025-05-14hw/intc/loongarch_pch: Merge three memory region into oneBibo Mao1-6/+0
Since memory region iomem supports memory access size with 1/2/4/8, it can be used for memory region iomem8 and iomem32_high. Now remove memory region iomem8 and iomem32_high, merge them into iomem together. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20250507023754.1877445-5-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2025-05-14hw/intc/loongarch_pch: Modify register name PCH_PIC_xxx_OFFSET with PCH_PIC_xxxBibo Mao1-1/+1
Macro PCH_PIC_HTMSI_VEC_OFFSET and PCH_PIC_ROUTE_ENTRY_OFFSET is renamed as PCH_PIC_HTMSI_VEC and PCH_PIC_ROUTE_ENTRY separately, it is easier to understand. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Clement Mathieu--Drif <clement.mathieu--drif@eviden.com> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20250507023148.1877287-3-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2025-05-14hw/intc/loongarch_pch: Modify name of some registersBibo Mao1-1/+1
For some registers with width 8 bytes, its name is something like PCH_PIC_INT_ID_LO and PCH_PIC_INT_ID_HI. From hardware manual, register name is PCH_PIC_INT_ID instead. Here name PCH_PIC_INT_ID is used, and PCH_PIC_INT_ID + 4 is used for PCH_PIC_INT_ID_HI. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Clement Mathieu--Drif <clement.mathieu--drif@eviden.com> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20250507023148.1877287-2-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2025-05-06hw/loongarch/virt: Allow user to customize OEM ID and OEM table IDBibo Mao1-0/+58
On LoongArch virt machine, the default OEM ID and OEM table ID is "BOCHS " and "BXPC ". Here property x-oem-id and x-oem-table-id is added on virt machine to set customized OEM ID and OEM table ID. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
2025-05-06hw/loongarch/virt: Replace RSDT with XSDT tableBibo Mao1-6/+6
XSDT table is introduced in ACPI Specification 5.0, it supports 64-bit address in the table. There is LoongArch system support from ACPI Specification 6.4 and later, XSDT is supported by LoongArch system. Here replace RSDT with XSDT table. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
2025-05-06hw/loongarch/virt: Get physical entry address with elf fileBibo Mao1-0/+1
With load_elf() api, image load low address and high address is converted to physical address if parameter translate_fn is provided. However executing entry address is still virtual address. Here convert entry address into physical address, since MMU is disabled when system power on, the first PC instruction should be physical address. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Song Gao <gaosong@loongson.cn>
2025-04-25qom: Make InterfaceInfo[] uses constPhilippe Mathieu-Daudé1-1/+1
Mechanical change using: $ sed -i -E 's/\(InterfaceInfo.?\[/\(const InterfaceInfo\[/g' \ $(git grep -lE '\(InterfaceInfo.?\[\]\)') Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250424194905.82506-7-philmd@linaro.org>
2025-04-25qom: Have class_init() take a const data argumentPhilippe Mathieu-Daudé1-1/+1
Mechanical change using gsed, then style manually adapted to pass checkpatch.pl script. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250424194905.82506-4-philmd@linaro.org>
2025-04-24Merge tag 'pull-misc-2025-04-24' of https://repo.or.cz/qemu/armbru into stagingStefan Hajnoczi1-2/+0
Miscellaneous patches for 2025-04-24 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmgJ7dYSHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZTiZIP/1PFAg/s3SoiLQwH/ZrjyUkm1kiKnjOH # CC5Stw6I9tuYnDAhASAdSymofLv0NNydNe5ai6ZZAWRyRYjIcfNigKAGK4Di+Uhe # nYxT0Yk8hNGwMhl6NnBp4mmCUNCwcbjT9uXdiYQxFYO/qqYR1388xJjeN3c362l3 # AaLrE5bX5sqa6TAkTeRPjeIqxlyGT7jnCrN7I1hMhDvbc3ITF3AMfYFMjnmAQgr+ # mTWGS1QogqqkloODbR1DKD1CAWOlpK+0HibhNF+lz71P0HlwVvy+HPXso505Wf0B # dMwlSrZ1DnqNVF/y5IhMEMslahKajbjbFVhBjmrGl/8T821etCxxgB20c0vyFRy8 # qTyJGwBZaEo0VWr70unSmq45TRoeQvdHAw/e+GtilR0ci80q2ly4gbObnw7L8le+ # gqZo4IWmrwp2sbPepE57sYKQpEndwbRayf/kcFd0LPPpeINu9ZooXkYX0pOo6Cdg # vDKMaEB1/fmPhjSlknxkKN9LZdR+nDw8162S1CKsUdWanAOjmP8haN19aoHhIekZ # q+r2qUq/U827yNy9/qbInmsoFYDz9s6sAOE63jibd5rZZ9Anei6NOSgLzA4CqCR1 # +d0+TXp19gP9mLMFs7/ZclwkXCz47OQYhXYphjI3wM9x+xbdRcI4n+DOH5u5coKx # AsA6+2n0GF4Y # =GaoH # -----END PGP SIGNATURE----- # gpg: Signature made Thu 24 Apr 2025 03:52:54 EDT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-misc-2025-04-24' of https://repo.or.cz/qemu/armbru: cleanup: Drop pointless label at end of function cleanup: Drop pointless return at end of function cleanup: Re-run return_directly.cocci Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-04-24cleanup: Drop pointless return at end of functionMarkus Armbruster1-2/+0
A few functions now end with a label. The next commit will clean them up. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250407082643.2310002-3-armbru@redhat.com> [Straightforward conflict with commit 988ad4ccebb6 (hw/loongarch/virt: Fix cpuslot::cpu set at last in virt_cpu_plug()) resolved]
2025-04-23exec/cpu-all: remove exec/target_page includePierrick Bouvier1-0/+1
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23include/system: Move exec/address-spaces.h to system/address-spaces.hRichard Henderson1-1/+1
Convert the existing includes with sed. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-08hw/loongarch/virt: Replace destination error with error_abortBibo Mao1-32/+7
In function virt_cpu_plug() and virt_cpu_unplug(), the error is impossile. Destination error is not propagated and replaced with error_abort. With this, the logic is simple. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Acked-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20250324030145.3037408-3-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2025-04-08hw/loongarch/virt: Fix cpuslot::cpu set at last in virt_cpu_plug()Bibo Mao1-2/+2
In function virt_cpu_plug(), Object cpuslot::cpu is set at last only when there is no any error, otherwise it is problematic that cpuslot::cpu is set in advance however it returns because of error. Fixes: ab9935d2991e (hw/loongarch/virt: Implement cpu plug interface) Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20250324030145.3037408-2-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2025-03-23Merge tag 'pull-error-2025-03-21' of https://repo.or.cz/qemu/armbru into stagingStefan Hajnoczi1-24/+15
Error reporting patches for 2025-03-21 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmfdeWkSHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZTeigQAJicOKRQPm5qCn/XP70k6OuvTXsU8Fw/ # FVXE3I1lE9MnUDVHe9RgY79piS7oQ/pR92QcPxTx/Kj22gSiFBgrH5q0bURZAOxR # /85DTxjVGuz3pAMhfXZ3rRyJGhX4MgPmYYXkvOyrz0cpHMR3DN9helIfdVfVtWAh # VTVEH2PKdd9I56gbi9irlfdeh/+Nb2+1swBbtpUWFthDPj7Cib+gHsrJQbRX7qSf # 0eEGVgqydfAuSLbMnD6SwCXbuJQ/mHg5+71QmSJFqthRzLHqXuUk6m6n8EXTgE6D # MEdwkhSZ6ksNEWkzBvv3lfO8WnAqH0jp+xkuDTJabJzZG17pC61B2HQRsrFxZxqU # Ftr4XDPccDc9ohX0GYwCpvfW2Y8ZLzjurc04dpSPoqIBZxAPySirWOmTbT7I6MFF # EVt4VdjwXi0jSLWeH0yq6NmpSiKDxC6kY78xvAx6Pr9QQWtCeH/sQKXQ+16IqqTf # aeM4zXUs8cWD+QULqkxp7aHJPg91zU+BQGopkmMCpCNGwnzJPajfJgCDsWHnn47z # jiuOISWS650bUL6D4GgC1l2pYVPqt3ybF6DZL0giDE6NPpIich/KA1SSVXDy3bVK # AGRMczC40GHvlDFKkLI0j5HM1HY8aYdn44skY28R/+SzyV0463u5oljcYmDe7oWC # iLtinF/DKCDa # =FJPm # -----END PGP SIGNATURE----- # gpg: Signature made Fri 21 Mar 2025 10:36:25 EDT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-error-2025-03-21' of https://repo.or.cz/qemu/armbru: target/loongarch: Clean up virt_cpu_irq_init() error handling target/loongarch: Remove unnecessary temporary variable assignment hw/loongarch/virt: Eliminate error_propagate() target/loongarch: Fix error handling of KVM feature checks hw/xen: Downgrade a xen_bus_realize() non-error to warning hw/xen: Fix xen_bus_realize() error handling error: Strip trailing '\n' from an error string argument cryptodev: Fix error handling in cryptodev_lkcf_execute_task() Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-03-21hw/uefi-vars-sysbus: allow for loongarch virtGerd Hoffmann1-0/+2
Allow the device being added to loongarch virt VMs. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-ID: <20250319141159.1461621-6-kraxel@redhat.com>
2025-03-20target/loongarch: Clean up virt_cpu_irq_init() error handlingBibo Mao1-3/+4
The Error ** argument must be NULL, &error_abort, &error_fatal, or a pointer to a variable containing NULL. Passing an argument of the latter kind twice without clearing it in between is wrong: if the first call sets an error, it no longer points to NULL for the second call. virt_cpu_irq_init() is wrong that way: it passes &err to hotplug_handler_plug() twice. If both calls failed, this could trip error_setv()'s assertion. Moreover, if just one fails, the Error object leaks. Fortunately, these calls can't actually fail. Messed up in commit 50ebc3fc47f7 (hw/intc/loongarch_ipi: Notify ipi object when cpu is plugged) and commit 087a23a87c57 (hw/intc/loongarch_extioi: Use cpu plug notification). Clean this up by passing &error_abort instead. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Acked-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250320032158.1762751-7-maobibo@loongson.cn> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2025-03-20hw/loongarch/virt: Eliminate error_propagate()Bibo Mao1-21/+11
When there is an error, it is put into a local variable and then propagated to somewhere else. Instead the error can be set right away, error propagation can be removed. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Message-ID: <20250320032158.1762751-5-maobibo@loongson.cn> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2025-03-05hw/loongarch/virt: Enable cpu hotplug feature on virt machineBibo Mao1-2/+42
On virt machine, enable CPU hotplug feature has_hotpluggable_cpus. For hot-added CPUs, there is socket-id/core-id/thread-id property set, arch_id can be caculated from these properties. So that cpu slot can be searched from its arch_id. Co-developed-by: Xianglai Li <lixianglai@loongson.cn> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
2025-03-05hw/loongarch/virt: Update the ACPI table for hotplug cpuBibo Mao3-3/+43
On LoongArch virt machine, ACPI GED hardware is used for CPU hotplug handler, here CPU hotplug support feature is added based on GED handler, also CPU scan and reject method is added about CPU device in DSDT table. Co-developed-by: Xianglai Li <lixianglai@loongson.cn> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
2025-03-05hw/loongarch/virt: Implement cpu plug interfaceBibo Mao1-11/+77
Implement cpu plug interface, and cold-plug cpu uses plug interface when cpu object is created. Co-developed-by: Xianglai Li <lixianglai@loongson.cn> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
2025-03-05hw/loongarch/virt: Implement cpu unplug interfaceBibo Mao1-0/+58
Implement cpu unplug interfaces including virt_cpu_unplug_request() and virt_cpu_unplug(). Co-developed-by: Xianglai Li <lixianglai@loongson.cn> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
2025-03-05hw/loongarch/virt: Add basic cpu plug interface frameworkBibo Mao1-0/+29
Add basic cpu hotplug interface framework, cpu hotplug interface is stub function and only framework is added here. Co-developed-by: Xianglai Li <lixianglai@loongson.cn> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
2025-03-05hw/loongarch/virt: Add CPU topology supportBibo Mao1-8/+51
Add topological relationships for Loongarch VCPU and initialize topology member variables. On LoongArch system there is socket/core/thread topo information, physical CPU id is calculated from CPU topo, every topo sub-field is aligned by power of 2. So it is different from logical cpu index. Co-developed-by: Xianglai Li <lixianglai@loongson.cn> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
2025-03-05hw/intc/loongarch_extioi: Use cpu plug notificationBibo Mao1-10/+2
Use hotplug_handler_plug() to nofity extioi object when cold-plug cpu is created, so that extioi can set and configure irq routing to new cpu. Signed-off-by: Bibo Mao <maobibo@loongson.cn>
2025-03-05hw/intc/loongarch_ipi: Notify ipi object when cpu is pluggedBibo Mao1-3/+2
Use hotplug_handler_plug() to nofity ipi object when cold-plug cpu is created, so that ipi can set and configure irq routing to new cpu. Signed-off-by: Bibo Mao <maobibo@loongson.cn>
2025-03-03Merge tag 'pull-target-arm-20250225' of ↵Stefan Hajnoczi1-1/+0
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * hw/arm/smmuv3: Fill u.f_cd_fetch.addr for SMMU_EVT_F_CD_FETCH * hw/arm/virt: Support larger highmem MMIO regions * machine: Centralize -machine dumpdtb option handling and report attempt to dump nonexistent DTB as an error * fpu: remove target ifdefs and build it only once * target/arm: Refactor to move TCG-only vfp_helper code into tcg/ * target/arm/hvf: Disable SME feature * target/arm/hvf: sign extend the data for a load operation when SSE=1 * hw/misc/npcm_clk: fix buffer-overflow * hw/arm: Add i.MX 8M Plus EVK board ("imx8mp-evk") # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAme+BaQZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3kG0EACuWqAhqYdn2muu1Rc3WQMh # uMOdb/f7oaqbCpeBEdV1dazWfZJQ1Zk05J31t+tdoYowqM7nS55Vw9zrSntoC6Ll # IYRzBmGWE+FnsODKhA0wx/lQO08GeMTrkHoGM72hiwIjbuC/Nps9aOQ2GH6WOCjN # TACXF1dYNpoy+H979yIwGMWH1SSgn1fS+9zw3LsKCGtbnt7g80DyWpb6qlfKPJ78 # KHmpth//sCPbu6UtsFKTBlIb0dYtAWTnRoS834WBq9bw51OPh81WoApSBkjV479z # kTcLyaJnoTKsPnz+6A/z3Fm/qi4aATk4/eCCT2ry3Oyi3ffafSlBf/KiFqAZ0Fue # vq6/b/wsVTdyjnkcptmCHJ+6qEhPshNi3F4hu8YOFQsx+6zFR7NUkZrNt/IQIhZB # DOcjtMFymg/duEbRW9RdLeVC3Ds2qVuxnzEbLmNJntBp+jkhm5QkWf6ZEJ6iviOf # tSP+SLOFyCT71BdQSIMhLJHS9UPJ3vzgGkN54YCLDYg24aNCMSe0nqLFMxfchQJm # njn1BdyX4pDibXv6tdDJdtOv3sLgvVaZZKEGlTGtNx8kq8qmXnzIJl6iQSBTrmD5 # qMb4NxaYG6hpzSQOV+XxLQ1BdLNj2qXs90EU1Jqfp378sOdl6Oyx5po5NIcyp36o # g+GsbLqphJL4DkosoH8eFA== # =MBWK # -----END PGP SIGNATURE----- # gpg: Signature made Wed 26 Feb 2025 02:02:12 HKT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20250225' of https://git.linaro.org/people/pmaydell/qemu-arm: (43 commits) hw/arm/fsl-imx8mp: Add on-chip RAM hw/arm/fsl-imx8mp: Add USB support hw/arm/fsl-imx8mp: Add Ethernet controller hw/arm/fsl-imx8mp: Implement general purpose timers hw/arm/fsl-imx8mp: Add watchdog support hw/arm/fsl-imx8mp: Add SPI controllers hw/arm/fsl-imx8mp: Add I2C controllers hw/arm/fsl-imx8mp: Add GPIO controllers hw/arm/fsl-imx8mp: Add PCIe support hw/arm/fsl-imx8mp: Add USDHC storage controllers hw/arm/fsl-imx8mp: Add SNVS hw/arm/fsl-imx8mp: Implement clock tree hw/arm: Add i.MX 8M Plus EVK board hw/gpio/pca955*: Move Kconfig switches next to implementations hw/pci-host/designware: Prevent device attachment on internal PCIe root bus hw/usb/hcd-dwc3: Align global registers size with Linux hw/misc/npcm_clk: fix buffer-overflow target/arm/hvf: sign extend the data for a load operation when SSE=1 target/arm/hvf: Disable SME feature target/arm: Rename vfp_helper.c to vfp_fpscr.c ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-02-25target/loongarch: Enable virtual extioi featureBibo Mao1-8/+0
Feature virtual extioi is loongArch virt machine property rather than vCPU property in qemu side. However it is vCPU property in KVM kernel side, here add loongArch virt machine property checking and enable virt extioi feature when vCPU is created. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn>
2025-02-24hw: Centralize handling of -machine dumpdtb optionPeter Maydell1-1/+0
Currently we handle the 'dumpdtb' machine sub-option ad-hoc in every board model that has an FDT. It's up to the board code to make sure it calls qemu_fdt_dumpdtb() in the right place. This means we're inconsistent and often just ignore the user's command line argument: * if the board doesn't have an FDT at all * if the board supports FDT, but there happens not to be one present (usually because of a missing -fdt option) This isn't very helpful because it gives the user no clue why their option was ignored. However, in order to support the QMP/HMP dumpdtb commands we require now that every FDT machine stores a pointer to the FDT in MachineState::fdt. This means we can handle -machine dumpdtb centrally by calling the qmp_dumpdtb() function, unifying its handling with the QMP/HMP commands. All the board code calls to qemu_fdt_dumpdtb() can then be removed. For this commit we retain the existing behaviour that if there is no FDT we silently ignore the -machine dumpdtb option. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2025-02-12hw/loongarch/virt: CPU irq line connection improvementBibo Mao1-24/+36
Interrupt controller extioi and ipi connect to CPU with irq line method. With command -smp x, -device la464-loongarch-cpu, smp.cpus is not accurate for all possible CPU objects, possible_cpu_arch_ids() is used. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn>
2025-02-12hw/loongarch/virt: Remove unused ipistateBibo Mao1-5/+0
Field ipistate in LoongArch CPU object is not used any more, remove it here. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn>
2025-02-12hw/loongarch/virt: Set iocsr address space when CPU is createdBibo Mao1-1/+1
There is only one iocsr address space for the whole virt-machine board. When CPU is created, the one of percpu points to that of the board. Here set iocsr address space when CPU is created rather than IPI creation stage. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn>
2025-02-12hw/loongarch/virt: Add separate file for fdt buildingBibo Mao3-525/+538
Similiar with virt-acpi-build.c, file virt-fdt-build.c is added here. And move functions relative with fdt table building to the file. It is only code movement and there is no function change. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-02-12hw/loongarch/virt: Rename function prefix nameBibo Mao2-4/+4
Replace function prefix name loongarch_xxx with virt_xxx in file virt-acpi-build.c Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-02-12hw/loongarch/virt: Rename filename acpi-build with virt-acpi-buildBibo Mao2-1/+1
File acpi-build.c is relative with virt machine type, rename it with virt-acpi-build.c Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-01-31hw/loader: Pass ELFDATA endian order argument to load_elf()Philippe Mathieu-Daudé1-1/+1
Rather than passing a boolean 'is_big_endian' argument, directly pass the ELFDATA, which can be unspecified using the ELFDATANONE value. Update the call sites: 0 -> ELFDATA2LSB 1 -> ELFDATA2MSB TARGET_BIG_ENDIAN -> TARGET_BIG_ENDIAN ? ELFDATA2MSB : ELFDATA2LSB Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250127113824.50177-7-philmd@linaro.org>
2025-01-15hw/intc/loongarch_ipi: Remove property num-cpuBibo Mao1-1/+0
Since cpu number can be acquired from possible_cpu_arch_ids(), num-cpu property is not necessary. Here remove num-cpu property for object TYPE_LOONGARCH_IPI object. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn>
2025-01-13hw/loongarch/virt: Checkpatch cleanupBibo Mao3-6/+9
Code cleanup with directory hw/loongarch/, removing errors from command "scripts/checkpatch.pl hw/loongarch/*" Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250103064514.2660438-1-maobibo@loongson.cn> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-01-09hw/intc/loongarch_extioi: Remove num-cpu propertyBibo Mao1-1/+0
Since cpu number can be acquired from possible_cpu_arch_ids(), num-cpu property is not necessary. Here remove num-cpu property for object TYPE_LOONGARCH_EXTIOI_COMMON object. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn>
2025-01-09hw/loongarch/boot: Support Linux raw boot imageJiaxun Yang1-0/+69
Support booting such image by parsing header as per Linux's specification [1]. This enabled booting vmlinux.efi/vmlinuz.efi shipped by distros without supplying BIOS. [1]: https://docs.kernel.org/arch/loongarch/booting.html Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn>
2024-12-30hw/pci-host/gpex: Allow more than 4 legacy IRQsAlexander Graf1-6/+6
Some boards such as vmapple don't do real legacy PCI IRQ swizzling. Instead, they just keep allocating more board IRQ lines for each new legacy IRQ. Let's support that mode by giving instantiators a new "nr_irqs" property they can use to support more than 4 legacy IRQ lines. In this mode, GPEX will export more IRQ lines, one for each device. Signed-off-by: Alexander Graf <graf@amazon.com> Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20241223221645.29911-9-phil@philjordan.eu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-12-27hw/loongarch/virt: Improve fdt table creation for CPU objectBibo Mao1-14/+25
For CPU object, possible_cpu_arch_ids() function is used rather than smp.cpus. With command -smp x, -device la464-loongarch-cpu, smp.cpus is not accurate for all possible CPU objects, possible_cpu_arch_ids() is used here. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn>
2024-12-27hw/loongarch/virt: Create fdt table on machine creation done notificationBibo Mao1-46/+57
The same with ACPI table, fdt table is created on machine done notification. Some objects like CPU objects can be created with cold-plug method with command such as -smp x, -device la464-loongarch-cpu, so all objects finish to create when machine is done. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn>
generated by cgit v1.1 at 2025-07-12 18:17:14 +0000