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2018-12-21spapr: add a 'reset' method to the sPAPR IRQ backendCédric Le Goater1-0/+17
2018-12-21spapr: allocate the interrupt thread context under the CPU coreCédric Le Goater1-0/+22
2018-12-21spapr: add device tree support for the XIVE exploitation modeCédric Le Goater2-1/+69
2018-12-21spapr: add hcalls support for the XIVE exploitation interrupt modeCédric Le Goater1-0/+982
2018-12-21spapr/xive: use the VCPU id as a NVT identifierCédric Le Goater1-1/+55
2018-12-21spapr/xive: introduce a XIVE interrupt controllerCédric Le Goater2-0/+367
2018-12-21ppc/xive: notify the CPU when the interrupt priority is more privilegedCédric Le Goater1-1/+95
2018-12-21ppc/xive: introduce a simplified XIVE presenterCédric Le Goater1-0/+190
2018-12-21ppc/xive: introduce the XIVE interrupt thread contextCédric Le Goater1-0/+424
2018-12-21ppc/xive: add support for the END Event State BuffersCédric Le Goater1-2/+158
2018-12-21ppc/xive: introduce the XIVE Event Notification DescriptorsCédric Le Goater1-0/+174
2018-12-21ppc/xive: introduce the XiveRouter modelCédric Le Goater1-0/+77
2018-12-21ppc/xive: introduce the XiveNotifier interfaceCédric Le Goater1-0/+25
2018-12-21ppc/xive: add support for the LSI interrupt sourcesCédric Le Goater1-6/+61
2018-12-21ppc/xive: introduce a XIVE interrupt source modelCédric Le Goater2-0/+383
2018-12-16Merge remote-tracking branch 'remotes/pmaydell/tags/pull-misc-20181214' into ...Peter Maydell1-3/+4
2018-12-14Rename cpu_physical_memory_write_rom() to address_space_write_rom()Peter Maydell1-3/+4
2018-12-13target/arm: Introduce arm_hcr_el2_effRichard Henderson1-10/+11
2018-12-13intc/puv3_intc: Convert sysbus init function to realize functionMao Zhongyi1-7/+4
2018-11-27vmstate: constify VMStateFieldMarc-André Lureau1-2/+2
2018-10-24target/arm: Move some system registers into a substructureRichard Henderson1-6/+6
2018-10-19ioapic: Fix error handling in realize()Markus Armbruster1-4/+4
2018-10-19Use error_fatal to simplify obvious fatal errors (again)Markus Armbruster1-6/+1
2018-10-19error: Fix use of error_prepend() with &error_fatal, &error_abortMarkus Armbruster1-6/+9
2018-09-25hw/intc/arm_gic: Drop GIC_BASE_IRQ macroPeter Maydell3-20/+14
2018-08-24hw/intc/arm_gic: Make per-cpu GICH memory regions 0x200 bytes largePeter Maydell1-1/+1
2018-08-23hw/intc/apic: Switch away from old_mmioPeter Maydell1-24/+18
2018-08-20nvic: Expose NMI linePeter Maydell2-0/+20
2018-08-20hw/intc/arm_gicv3_its: downgrade error_report to warn_report in kvm_arm_its_r...Jia He1-1/+1
2018-08-14target/arm: Provide accessor functions for HCR_EL2.{IMO, FMO, AMO}Peter Maydell1-9/+10
2018-08-14intc/arm_gic: Improve tracesLuc Michel2-8/+35
2018-08-14intc/arm_gic: Implement maintenance interrupt generationLuc Michel1-0/+97
2018-08-14intc/arm_gic: Implement gic_update_virt() functionLuc Michel1-39/+136
2018-08-14intc/arm_gic: Implement the virtual interface registersLuc Michel1-2/+233
2018-08-14intc/arm_gic: Wire the vCPU interfaceLuc Michel1-2/+35
2018-08-14intc/arm_gic: Implement virtualization extensions in gic_cpu_(read|write)Luc Michel1-5/+15
2018-08-14intc/arm_gic: Implement virtualization extensions in gic_(deactivate|complete...Luc Michel1-4/+47
2018-08-14intc/arm_gic: Implement virtualization extensions in gic_acknowledge_irqLuc Michel1-19/+33
2018-08-14intc/arm_gic: Implement virtualization extensions in gic_(activate_irq|drop_p...Luc Michel1-12/+38
2018-08-14intc/arm_gic: Add virtualization enabled IRQ helper functionsLuc Michel2-18/+97
2018-08-14intc/arm_gic: Refactor secure/ns access check in the CPU interfaceLuc Michel1-17/+22
2018-08-14intc/arm_gic: Add virtualization extensions helper macros and functionsLuc Michel2-0/+79
2018-08-14intc/arm_gic: Add virtual interface register definitionsLuc Michel1-0/+65
2018-08-14intc/arm_gic: Add the virtualization extensions to the GIC stateLuc Michel4-26/+137
2018-08-14intc/arm_gic: Remove some dead code and put some functions staticLuc Michel2-25/+2
2018-08-14intc/arm_gic: Implement GICD_ISACTIVERn and GICD_ICACTIVERn registersLuc Michel1-4/+57
2018-08-14intc/arm_gic: Refactor operations on the distributorLuc Michel4-116/+127
2018-08-14nvic: Change NVIC to support ARMv6-MJulia Suvorova1-3/+18
2018-08-14arm: Add ARMv6-M programmer's model supportJulia Suvorova1-0/+10
2018-08-14nvic: Handle ARMv6-M SCS reserved registersJulia Suvorova1-2/+49
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