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AgeCommit message (Expand)AuthorFilesLines
2022-05-05ppc/xive: Update the state of the External interrupt signalFrederic Barrat2-0/+16
2022-05-05ppc/xive: Always recompute the PIPR when pushing an OS contextFrederic Barrat2-10/+17
2022-05-05target/arm: Replace sentinels with ARRAY_SIZE in cpregs.hRichard Henderson2-6/+0
2022-05-05target/arm: Split out cpregs.hRichard Henderson2-0/+3
2022-04-26hw/intc: Vectored Interrupt Controller (VIC)Amir Gonnen3-0/+317
2022-04-22Merge tag 'pull-target-arm-20220422-1' of https://git.linaro.org/people/pmayd...Richard Henderson9-242/+1508
2022-04-22hw/intc/arm_gicv3: Allow 'revision' property to be set to 4Peter Maydell2-5/+12
2022-04-22hw/intc/arm_gicv3: Update ID and feature registers for GICv4Peter Maydell6-12/+32
2022-04-22hw/intc/arm_gicv3_redist: Implement gicv3_redist_inv_vlpi()Peter Maydell1-2/+5
2022-04-22hw/intc/arm_gicv3_redist: Implement gicv3_redist_vinvall()Peter Maydell1-1/+7
2022-04-22hw/intc/arm_gicv3_redist: Implement gicv3_redist_mov_vlpi()Peter Maydell1-2/+18
2022-04-22hw/intc/arm_gicv3_redist: Use set_pending_table_bit() in mov handlingPeter Maydell1-8/+1
2022-04-22hw/intc/arm_gicv3_redist: Implement gicv3_redist_vlpi_pending()Peter Maydell1-2/+21
2022-04-22hw/intc/arm_gicv3_redist: Implement gicv3_redist_process_vlpi()Peter Maydell1-4/+44
2022-04-22hw/intc/arm_gicv3_redist: Factor out "update bit in pending table" codePeter Maydell1-19/+30
2022-04-22hw/intc/arm_gicv3_redist: Recalculate hppvlpi on VPENDBASER writesPeter Maydell1-3/+84
2022-04-22hw/intc/arm_gicv3_redist: Factor out "update hpplpi for all LPIs" logicPeter Maydell1-20/+46
2022-04-22hw/intc/arm_gicv3_redist: Factor out "update hpplpi for one LPI" logicPeter Maydell1-27/+47
2022-04-22hw/intc/arm_gicv3_cpuif: Don't recalculate maintenance irq unnecessarilyPeter Maydell1-5/+5
2022-04-22hw/intc/arm_gicv3_cpuif: Support vLPIsPeter Maydell5-6/+137
2022-04-22hw/intc/arm_gicv3_cpuif: Split "update vIRQ/vFIQ" from gicv3_cpuif_virt_update()Peter Maydell3-25/+53
2022-04-22hw/intc/arm_gicv3: Implement new GICv4 redistributor registersPeter Maydell3-0/+99
2022-04-22hw/intc/arm_gicv3: Implement GICv4's new redistributor framePeter Maydell3-5/+26
2022-04-22hw/intc/arm_gicv3_its: Implement VINVALLPeter Maydell4-0/+45
2022-04-22hw/intc/arm_gicv3_its: Implement VMOVIPeter Maydell4-0/+116
2022-04-22hw/intc/arm_gicv3_its: Implement INV for virtual interruptsPeter Maydell3-2/+31
2022-04-22hw/intc/arm_gicv3_its: Implement INV command properlyPeter Maydell4-2/+74
2022-04-22hw/intc/arm_gicv3_its: Implement VSYNCPeter Maydell3-0/+13
2022-04-22hw/intc/arm_gicv3_its: Implement VMOVPPeter Maydell3-0/+85
2022-04-22hw/intc/arm_gicv3: Keep pointers to every connected ITSPeter Maydell3-0/+6
2022-04-22hw/intc/arm_gicv3_its: Handle virtual interrupts in process_its_cmd()Peter Maydell4-2/+125
2022-04-22hw/intc/arm_gicv3_its: Split out process_its_cmd() physical interrupt codePeter Maydell1-17/+32
2022-04-22hw/intc/arm_gicv3_its: Factor out CTE lookup sequencePeter Maydell1-70/+39
2022-04-22hw/intc/arm_gicv3_its: Factor out "find ITE given devid, eventid"Peter Maydell1-50/+54
2022-04-22hw/intc/arm_gicv3_its: Distinguish success and error cases of CMD_CONTINUEPeter Maydell1-13/+16
2022-04-22hw/intc/arm_gicv3_its: Implement VMAPPPeter Maydell3-0/+102
2022-04-22hw/intc/arm_gicv3_its: Implement VMAPI and VMAPTIPeter Maydell3-0/+102
2022-04-22hw/intc/arm_gicv3_its: Implement GITS_BASER2 for GICv4Peter Maydell2-0/+41
2022-04-22hw/intc/arm_gicv3_its: Factor out "is intid a valid LPI ID?"Peter Maydell1-3/+7
2022-04-22hw/intc/arm_gicv3: Report correct PIDR0 values for ID registersPeter Maydell4-5/+16
2022-04-22hw/intc/arm_gicv3: Insist that redist region capacity matches CPU countPeter Maydell1-2/+2
2022-04-22hw/intc/arm_gicv3: Sanity-check num-cpu propertyPeter Maydell1-0/+4
2022-04-22hw/intc/arm_gicv3_its: Add missing blank linePeter Maydell1-0/+1
2022-04-22hw/intc: riscv_aclint: Add reset function of ACLINT devicesJim Shu1-0/+39
2022-04-22hw/intc: Make RISC-V ACLINT mtime MMIO register writableFrank Chang1-21/+50
2022-04-22hw/intc: Support 32/64-bit mtimecmp and mtime accesses in RISC-V ACLINTFrank Chang1-15/+27
2022-04-22hw/intc: Add .impl.[min|max]_access_size declaration in RISC-V ACLINTFrank Chang1-0/+4
2022-04-21Merge tag 'misc-pull-request' of gitlab.com:marcandre.lureau/qemu into stagingRichard Henderson1-6/+3
2022-04-21intc/exynos4210_gic: replace snprintf() with g_strdup_printf()Marc-André Lureau1-6/+3
2022-04-21hw/arm/exynos4210: Put combiners into state structPeter Maydell1-30/+1
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