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AgeCommit message (Expand)AuthorFilesLines
2023-07-07pnv/xive: Print CPU target in all TIMA tracesFrederic Barrat1-2/+2
2023-05-15hw/intc: Add NULL pointer check on LoongArch ipi deviceSong Gao1-0/+1
2023-01-13hw/intc: Extract the IRQ counting functions into a separate fileThomas Huth1-4/+5
2022-11-04hw/intc: Convert the memops to with_attrs in LoongArch extioiXiaojuan Yang1-2/+1
2022-06-06hw/intc: Add LoongArch extioi interrupt controller(EIOINTC)Xiaojuan Yang1-0/+6
2022-06-06hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI)Xiaojuan Yang1-0/+3
2022-06-06hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC)Xiaojuan Yang1-0/+9
2022-06-06hw/loongarch: Add LoongArch ipi interrupt support(IPI)Xiaojuan Yang1-0/+4
2022-04-22hw/intc/arm_gicv3_cpuif: Support vLPIsPeter Maydell1-1/+1
2022-04-22hw/intc/arm_gicv3_cpuif: Split "update vIRQ/vFIQ" from gicv3_cpuif_virt_update()Peter Maydell1-1/+2
2022-04-22hw/intc/arm_gicv3_its: Implement VINVALLPeter Maydell1-0/+1
2022-04-22hw/intc/arm_gicv3_its: Implement VMOVIPeter Maydell1-0/+1
2022-04-22hw/intc/arm_gicv3_its: Implement INV command properlyPeter Maydell1-1/+2
2022-04-22hw/intc/arm_gicv3_its: Implement VSYNCPeter Maydell1-0/+1
2022-04-22hw/intc/arm_gicv3_its: Implement VMOVPPeter Maydell1-0/+1
2022-04-22hw/intc/arm_gicv3_its: Handle virtual interrupts in process_its_cmd()Peter Maydell1-0/+2
2022-04-22hw/intc/arm_gicv3_its: Implement VMAPPPeter Maydell1-0/+2
2022-04-22hw/intc/arm_gicv3_its: Implement VMAPI and VMAPTIPeter Maydell1-0/+2
2022-03-07hw/intc/arm_gicv3_its: Add trace events for table reads and writesPeter Maydell1-0/+9
2022-03-07hw/intc/arm_gicv3_its: Add trace events for commandsPeter Maydell1-0/+12
2022-01-28hw/intc/arm_gicv3_its: Add tracepointsPeter Maydell1-0/+8
2021-10-30hw/sh4: Change debug printfs to tracesBALATON Zoltan1-0/+8
2021-08-27xive: Remove extra '0x' prefix in trace eventsCédric Le Goater1-5/+5
2021-06-02docs: fix references to docs/devel/tracing.rstStefano Garzarella1-1/+1
2021-05-12Drop the deprecated lm32 targetMarkus Armbruster1-9/+0
2021-03-15hw/intc: add goldfish-picLaurent Vivier1-0/+8
2021-02-10ppc/pnv: Add trace events for PCI event notificationCédric Le Goater1-0/+3
2020-12-14xive: Add trace eventsCédric Le Goater1-0/+33
2020-10-20hw/intc/bcm2835_ic: Trace GPU/CPU IRQ handlersPhilippe Mathieu-Daudé1-0/+4
2019-10-04xics: Rename misleading ics_simple_*() functionsDavid Gibson1-3/+3
2019-10-04xics: Eliminate 'reject', 'resend' and 'eoi' class hooksDavid Gibson1-2/+2
2019-09-23s390x/kvm: Officially require at least kernel 3.15Thomas Huth1-1/+0
2019-05-17ioapic: allow buggy guests mishandling level-triggered interrupts to make pro...Vitaly Kuznetsov1-0/+1
2019-03-22trace-events: Delete unused trace pointsMarkus Armbruster1-1/+0
2019-03-22trace-events: Shorten file names in commentsMarkus Armbruster1-17/+17
2018-08-20nvic: Expose NMI linePeter Maydell1-0/+1
2018-08-14intc/arm_gic: Improve tracesLuc Michel1-2/+10
2018-07-24target/arm: Escalate to correct HardFault when AIRCR.BFHFNMINS is setPeter Maydell1-1/+1
2018-03-06heathrow: convert to trace-eventsMark Cave-Ayland1-0/+5
2018-02-09target/arm: Split "get pending exception info" from "acknowledge it"Peter Maydell1-1/+2
2018-02-09target/arm: Add armv7m_nvic_set_pending_derived()Peter Maydell1-1/+1
2017-12-21i8259: convert DPRINTFs into tracePeter Xu1-0/+7
2017-12-15spapr: move the IRQ allocation routines under the machineCédric Le Goater1-4/+0
2017-11-14ioapic/tracing: Remove last DPRINTFsDr. David Alan Gilbert1-2/+3
2017-09-21nvic: Support banked exceptions in acknowledge and completePeter Maydell1-2/+2
2017-09-21nvic: Make SHPR registers bankedPeter Maydell1-1/+1
2017-09-21nvic: Make set_pending and clear_pending take a secure parameterPeter Maydell1-2/+2
2017-09-21nvic: Handle banked exceptions in nvic_recompute_state()Peter Maydell1-0/+1
2017-09-21nvic: Add cached vectpending_prio statePeter Maydell1-1/+1
2017-08-01trace-events: fix code style: print 0x before hex numbersVladimir Sementsov-Ogievskiy1-78/+78
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