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path: root/hw/intc/pnv_xive.c
AgeCommit message (Expand)AuthorFilesLines
2019-12-17ppc/pnv: Dump the XIVE NVT tableCédric Le Goater1-0/+64
2019-12-17ppc/pnv: Extend XiveRouter with a get_block_id() handlerCédric Le Goater1-0/+6
2019-12-17ppc/pnv: Introduce a pnv_xive_block_id() helperCédric Le Goater1-31/+33
2019-12-17ppc/xive: Remove the get_tctx() XiveRouter handlerCédric Le Goater1-13/+0
2019-12-17ppc/xive: Move the TIMA operations to the controller modelCédric Le Goater1-1/+34
2019-12-17ppc/pnv: Clarify how the TIMA is accessed on a multichip systemCédric Le Goater1-17/+23
2019-12-17ppc/xive: Extend the TIMA operation with a XivePresenter parameterCédric Le Goater1-2/+2
2019-12-17ppc/pnv: Fix TIMA indirect accessCédric Le Goater1-6/+7
2019-12-17ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helperCédric Le Goater1-0/+19
2019-12-17ppc/pnv: Loop on the threads of the chip to find a matching NVTCédric Le Goater1-26/+35
2019-12-17ppc/xive: Implement the XivePresenter interfaceCédric Le Goater1-0/+41
2019-12-17ppc/pnv: Quiesce some XIVE errorsCédric Le Goater1-1/+5
2019-12-17ppc/pnv: Remove pnv_xive_vst_size() routineCédric Le Goater1-69/+43
2019-12-17ppc/pnv: Link "chip" property to PnvXive::chip pointerGreg Kurz1-10/+3
2019-12-17xive: Link "xive" property to XiveEndSource::xrtr pointerGreg Kurz1-2/+2
2019-12-17xive: Link "xive" property to XiveSource::xive pointerGreg Kurz1-2/+2
2019-10-24ppc/pnv: Improve trigger data definitionCédric Le Goater1-4/+16
2019-08-21ppc/xive: Improve 'info pic' supportCédric Le Goater1-0/+9
2019-08-16Include hw/qdev-properties.h lessMarkus Armbruster1-0/+1
2019-08-16Include sysemu/reset.h a lot lessMarkus Armbruster1-0/+1
2019-07-02ppc/pnv: Rework cache watch model of PnvXIVECédric Le Goater1-36/+106
2019-07-02ppc/pnv: fix StoreEOI activationCédric Le Goater1-2/+1
2019-06-12Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster1-0/+1
2019-03-12ppc/pnv: add a XIVE interrupt controller model for POWER9Cédric Le Goater1-0/+1753
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