riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-02-08	hw/intc/arm_gicv3_its: Fix address calculation in get_ite() and update_ite()	Peter Maydell	1	-9/+10
2022-02-08	hw/intc/arm_gicv3_its: Use address_space_map() to access command queue packets	Peter Maydell	1	-2/+2
2022-01-28	hw/intc/arm_gicv3_its: Implement MOVI	Peter Maydell	1	-0/+16
2022-01-28	hw/intc/arm_gicv3_its: Implement MOVALL	Peter Maydell	1	-0/+16
2022-01-28	hw/intc/arm_gicv3: Set GICR_CTLR.CES if LPIs are supported	Peter Maydell	1	-0/+1
2022-01-28	hw/intc/arm_gicv3_its: Sort ITS command list into numeric order	Peter Maydell	1	-5/+5
2022-01-07	hw/intc/arm_gicv3_its: Use FIELD macros for CTEs	Peter Maydell	1	-1/+2
2022-01-07	hw/intc/arm_gicv3_its: Correct comment about CTE RDBase field size	Peter Maydell	1	-1/+1
2022-01-07	hw/intc/arm_gicv3_its: Use FIELD macros for DTEs	Peter Maydell	1	-3/+4
2022-01-07	hw/intc/arm_gicv3_its: Don't misuse GITS_TYPE_PHYSICAL define	Peter Maydell	1	-12/+14
2022-01-07	hw/intc/arm_gicv3_its: Remove redundant ITS_CTLR_ENABLED define	Peter Maydell	1	-2/+0
2021-11-26	hw/intc/arm_gicv3: Add new gicv3_intid_is_special() function	Peter Maydell	1	-0/+13
2021-11-26	hw/intc/arm_gicv3: Update cached state after LPI state changes	Peter Maydell	1	-0/+17
2021-09-13	hw/intc: GICv3 redistributor ITS processing	Shashi Mallela	1	-0/+9
2021-09-13	hw/intc: GICv3 ITS Feature enablement	Shashi Mallela	1	-0/+2
2021-09-13	hw/intc: GICv3 ITS Command processing	Shashi Mallela	1	-0/+12
2021-09-13	hw/intc: GICv3 ITS command queue framework	Shashi Mallela	1	-0/+40
2021-09-13	hw/intc: GICv3 ITS register definitions added	Shashi Mallela	1	-0/+29
2021-09-13	hw/intc: GICv3 ITS initial framework	Shashi Mallela	1	-10/+86
2017-02-28	target-arm: Add GICv3CPUState in CPUARMState struct	Vijaya Kumar K	1	-0/+2
2017-02-28	hw/intc/arm_gicv3_kvm: Implement get/put functions	Vijaya Kumar K	1	-0/+1
2017-01-20	hw/intc/gicv3: Add defines for ICH system register fields	Peter Maydell	1	-0/+79
2016-07-12	Clean up decorations and whitespace around header guards	Markus Armbruster	1	-1/+1
2016-06-17	hw/intc/arm_gicv3: Add IRQ handling CPU interface registers	Peter Maydell	1	-0/+5
2016-06-17	hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers	Peter Maydell	1	-0/+1
2016-06-17	hw/intc/arm_gicv3: Implement gicv3_cpuif_update()	Peter Maydell	1	-4/+1
2016-06-17	hw/intc/arm_gicv3: Implement GICv3 CPU interface registers	Peter Maydell	1	-0/+1
2016-06-17	hw/intc/arm_gicv3: Implement gicv3_set_irq()	Peter Maydell	1	-0/+2
2016-06-17	hw/intc/arm_gicv3: Implement GICv3 redistributor registers	Shlomo Pongratz	1	-0/+4
2016-06-17	hw/intc/arm_gicv3: Implement GICv3 distributor registers	Shlomo Pongratz	1	-0/+4
2016-06-17	hw/intc/arm_gicv3: Implement functions to identify next pending irq	Peter Maydell	1	-0/+121
2016-06-17	hw/intc/arm_gicv3: ARM GICv3 device framework	Shlomo Pongratz	1	-0/+24
2016-06-17	hw/intc/arm_gicv3: Add state information	Pavel Fedin	1	-0/+172