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arm_gicv3_cpuif.c
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Author
Files
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2020-01-17
arm/gicv3: update virtual irq state after IAR register read
Jeff Kubascik
1
-0
/
+3
2019-08-16
Include hw/irq.h a lot less
Markus Armbruster
1
-0
/
+1
2019-05-23
hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3
Peter Maydell
1
-2
/
+2
2019-05-23
hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1}
Peter Maydell
1
-1
/
+1
2018-12-13
target/arm: Introduce arm_hcr_el2_eff
Richard Henderson
1
-10
/
+11
2018-08-14
target/arm: Provide accessor functions for HCR_EL2.{IMO, FMO, AMO}
Peter Maydell
1
-9
/
+10
2018-07-24
hw/intc/arm_gicv3: Check correct HCR_EL2 bit when routing IRQ
Peter Maydell
1
-1
/
+1
2018-05-31
hw/intc/arm_gicv3: Fix APxR<n> register dispatching
Jan Kiszka
1
-6
/
+6
2018-04-26
target/arm: Fetch GICv3 state directly from CPUARMState
Aaron Lindsay
1
-8
/
+2
2018-03-23
hw/intc/arm_gicv3: Fix secure-GIC NS ICC_PMR and ICC_RPR accesses
Peter Maydell
1
-3
/
+3
2017-06-07
arm_gicv3: Fix ICC_BPR1 reset value when EL3 not implemented
Peter Maydell
1
-5
/
+1
2017-06-02
hw/intc/arm_gicv3_cpuif: Fix priority masking for NS BPR1
Peter Maydell
1
-4
/
+38
2017-06-02
hw/intc/arm_gicv3_cpuif: Don't let BPR be set below its minimum
Peter Maydell
1
-0
/
+6
2017-06-02
hw/intc/arm_gicv3_cpuif: Fix reset value for VMCR_EL2.VBPR1
Peter Maydell
1
-1
/
+1
2017-02-28
target-arm: Add GICv3CPUState in CPUARMState struct
Vijaya Kumar K
1
-0
/
+8
2017-02-24
tcg: drop global lock during TCG code execution
Jan Kiszka
1
-0
/
+3
2017-01-27
arm_gicv3: Fix broken logic in ELRSR calculation
Peter Maydell
1
-1
/
+1
2017-01-20
hw/intc/arm_gicv3: Implement EL2 traps for CPU i/f regs
Peter Maydell
1
-10
/
+60
2017-01-20
hw/intc/arm_gicv3: Implement gicv3_cpuif_virt_update()
Peter Maydell
1
-0
/
+49
2017-01-20
hw/intc/arm_gicv3: Implement ICV_ registers EOIR and IAR
Peter Maydell
1
-0
/
+220
2017-01-20
hw/intc/arm_gicv3: Implement ICV_ HPPIR, DIR and RPR registers
Peter Maydell
1
-3
/
+232
2017-01-20
hw/intc/arm_gicv3: Implement ICV_ registers which are just accessors
Peter Maydell
1
-0
/
+239
2017-01-20
hw/intc/arm_gicv3: Add accessors for ICH_ system registers
Peter Maydell
1
-0
/
+477
2017-01-20
hw/intc/gicv3: Add data fields for virtualization support
Peter Maydell
1
-0
/
+13
2016-12-27
hw/intc/arm_gicv3: Remove incorrect usage of fieldoffset
Peter Maydell
1
-7
/
+6
2016-10-17
hw/intc/arm_gicv3: Fix ICC register tracepoints
Peter Maydell
1
-8
/
+15
2016-06-27
hw/intc/arm_gicv3: Add missing break
Shannon Zhao
1
-0
/
+2
2016-06-17
hw/intc/arm_gicv3: Add IRQ handling CPU interface registers
Peter Maydell
1
-0
/
+437
2016-06-17
hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers
Peter Maydell
1
-0
/
+125
2016-06-17
hw/intc/arm_gicv3: Implement gicv3_cpuif_update()
Peter Maydell
1
-1
/
+139
2016-06-17
hw/intc/arm_gicv3: Implement GICv3 CPU interface registers
Peter Maydell
1
-0
/
+646