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hw
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arm_gicv3_cpuif.c
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2017-06-02
hw/intc/arm_gicv3_cpuif: Don't let BPR be set below its minimum
Peter Maydell
1
-0
/
+6
2017-06-02
hw/intc/arm_gicv3_cpuif: Fix reset value for VMCR_EL2.VBPR1
Peter Maydell
1
-1
/
+1
2017-02-28
target-arm: Add GICv3CPUState in CPUARMState struct
Vijaya Kumar K
1
-0
/
+8
2017-02-24
tcg: drop global lock during TCG code execution
Jan Kiszka
1
-0
/
+3
2017-01-27
arm_gicv3: Fix broken logic in ELRSR calculation
Peter Maydell
1
-1
/
+1
2017-01-20
hw/intc/arm_gicv3: Implement EL2 traps for CPU i/f regs
Peter Maydell
1
-10
/
+60
2017-01-20
hw/intc/arm_gicv3: Implement gicv3_cpuif_virt_update()
Peter Maydell
1
-0
/
+49
2017-01-20
hw/intc/arm_gicv3: Implement ICV_ registers EOIR and IAR
Peter Maydell
1
-0
/
+220
2017-01-20
hw/intc/arm_gicv3: Implement ICV_ HPPIR, DIR and RPR registers
Peter Maydell
1
-3
/
+232
2017-01-20
hw/intc/arm_gicv3: Implement ICV_ registers which are just accessors
Peter Maydell
1
-0
/
+239
2017-01-20
hw/intc/arm_gicv3: Add accessors for ICH_ system registers
Peter Maydell
1
-0
/
+477
2017-01-20
hw/intc/gicv3: Add data fields for virtualization support
Peter Maydell
1
-0
/
+13
2016-12-27
hw/intc/arm_gicv3: Remove incorrect usage of fieldoffset
Peter Maydell
1
-7
/
+6
2016-10-17
hw/intc/arm_gicv3: Fix ICC register tracepoints
Peter Maydell
1
-8
/
+15
2016-06-27
hw/intc/arm_gicv3: Add missing break
Shannon Zhao
1
-0
/
+2
2016-06-17
hw/intc/arm_gicv3: Add IRQ handling CPU interface registers
Peter Maydell
1
-0
/
+437
2016-06-17
hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers
Peter Maydell
1
-0
/
+125
2016-06-17
hw/intc/arm_gicv3: Implement gicv3_cpuif_update()
Peter Maydell
1
-1
/
+139
2016-06-17
hw/intc/arm_gicv3: Implement GICv3 CPU interface registers
Peter Maydell
1
-0
/
+646