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Commit message (
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Author
Files
Lines
2016-09-15
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
Peter Maydell
2
-8
/
+11
2016-09-15
kvmvapic: fix state change handler
Pavel Dovgalyuk
1
-0
/
+1
2016-09-15
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
Peter Maydell
1
-2
/
+25
2016-09-14
pc: apic: fix touch LAPIC when irqchip is split
Wanpeng Li
1
-8
/
+10
2016-09-13
x86/lapic: Load LAPIC state at post_load
Dr. David Alan Gilbert
1
-2
/
+25
2016-09-13
trace-event: display "%d" instead of "0x%d"
Laurent Vivier
1
-1
/
+1
2016-09-13
pic: fix typo in error message: KVM_GET_IRQCHIP -> KVM_SET_IRQCHIP
Bruce Rogers
1
-1
/
+1
2016-09-09
pc: Add 2.8 machine
Longpeng(Mike)
2
-5
/
+24
2016-09-08
pc: keep gsi reference
Marc-André Lureau
2
-16
/
+14
2016-09-08
pc: free i8259
Marc-André Lureau
1
-0
/
+2
2016-09-08
acpi-build: fix array leak
Marc-André Lureau
1
-2
/
+2
2016-09-08
pc: don't leak a20_line
Marc-André Lureau
1
-0
/
+1
2016-09-08
pc: simplify passing qemu_irq
Marc-André Lureau
1
-4
/
+4
2016-08-12
trace-events: fix first line comment in trace-events
Laurent Vivier
1
-1
/
+1
2016-08-08
error: Fix error_printf() calls lacking newlines
Markus Armbruster
1
-1
/
+1
2016-07-29
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
Peter Maydell
1
-36
/
+95
2016-07-29
hw/apci: handle 64-bit MMIO regions correctly
Marcel Apfelbaum
1
-9
/
+45
2016-07-29
acpi: refactor pxb crs computation
Marcel Apfelbaum
1
-31
/
+50
2016-07-29
hw/acpi: fix a DSDT table issue when a pxb is present.
Marcel Apfelbaum
1
-0
/
+4
2016-07-26
Revert "pc: Enforce adding CPUs contiguously and removing them in opposite or...
Igor Mammedov
1
-34
/
+0
2016-07-26
pc: Init CPUState->cpu_index with index in possible_cpus[]
Igor Mammedov
1
-0
/
+4
2016-07-21
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
Peter Maydell
8
-30
/
+646
2016-07-21
intel_iommu: avoid unnamed fields
Michael S. Tsirkin
1
-21
/
+21
2016-07-21
intel_iommu: disallow kernel-irqchip=on with IR
Peter Xu
1
-0
/
+11
2016-07-21
intel_iommu: support all masks in interrupt entry cache invalidation
Radim Krčmář
2
-1
/
+2
2016-07-21
kvm-irqchip: do explicit commit when update irq
Peter Xu
1
-0
/
+2
2016-07-21
kvm-irqchip: simplify kvm_irqchip_add_msi_route
Peter Xu
1
-6
/
+2
2016-07-21
intel_iommu: add SID validation for IR
Peter Xu
1
-11
/
+58
2016-07-21
intel_iommu: Add support for Extended Interrupt Mode
Jan Kiszka
2
-7
/
+11
2016-07-21
x86-iommu: introduce IEC notifiers
Peter Xu
4
-11
/
+81
2016-07-21
intel_iommu: add support for split irqchip
Peter Xu
1
-0
/
+7
2016-07-21
q35: ioapic: add support for emulated IOAPIC IR
Peter Xu
2
-1
/
+8
2016-07-21
intel_iommu: get rid of {0} initializers
Michael S. Tsirkin
1
-3
/
+3
2016-07-20
intel_iommu: Add support for PCI MSI remap
Peter Xu
2
-0
/
+241
2016-07-20
intel_iommu: add IR translation faults defines
Peter Xu
1
-0
/
+13
2016-07-20
intel_iommu: handle interrupt remap enable
Peter Xu
1
-0
/
+20
2016-07-20
intel_iommu: define interrupt remap table addr register
Peter Xu
2
-1
/
+55
2016-07-20
acpi: add DMAR scope definition for root IOAPIC
Peter Xu
1
-3
/
+17
2016-07-20
intel_iommu: set IR bit for ECAP register
Peter Xu
2
-0
/
+8
2016-07-20
intel_iommu: allow queued invalidation for IR
Peter Xu
2
-0
/
+11
2016-07-20
acpi: enable INTR for DMAR report structure
Peter Xu
1
-1
/
+13
2016-07-20
x86-iommu: introduce "intremap" property
Peter Xu
1
-0
/
+23
2016-07-20
x86-iommu: provide x86_iommu_get_default
Peter Xu
2
-7
/
+25
2016-07-20
intel_iommu: rename VTD_PCI_DEVFN_MAX to x86-iommu
Peter Xu
1
-4
/
+7
2016-07-20
x86-iommu: introduce parent class
Peter Xu
3
-3
/
+57
2016-07-20
pc: Make device_del CPU work for x86 CPUs
Igor Mammedov
1
-6
/
+5
2016-07-20
(kvm)apic: Add unrealize callbacks
Igor Mammedov
1
-0
/
+5
2016-07-20
apic: kvm-apic: Fix crash due to access to freed memory region
Igor Mammedov
1
-2
/
+2
2016-07-20
pc: Implement query-hotpluggable-cpus callback
Igor Mammedov
1
-0
/
+45
2016-07-20
pc: Enforce adding CPUs contiguously and removing them in opposite order
Igor Mammedov
1
-0
/
+34
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