index
:
riscv-gnu-toolchain/qemu.git
block
master
stable-0.10
stable-0.11
stable-0.12
stable-0.13
stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
stable-1.3
stable-1.4
stable-1.5
stable-1.6
stable-1.7
stable-2.0
stable-2.1
stable-2.10
stable-2.11
stable-2.12
stable-2.2
stable-2.3
stable-2.4
stable-2.5
stable-2.6
stable-2.7
stable-2.8
stable-2.9
stable-3.0
stable-3.1
stable-4.0
stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.1
stable-7.2
stable-8.0
stable-8.1
stable-8.2
stable-9.0
stable-9.1
stable-9.2
staging
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
staging-9.1
staging-9.2
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
hw
/
i386
/
intel_iommu_internal.h
Age
Commit message (
Expand
)
Author
Files
Lines
2023-10-22
intel-iommu: Report interrupt remapping faults, fix return value
David Woodhouse
1
-0
/
+1
2023-08-03
hw/i386/intel_iommu: Fix struct VTDInvDescIEC on big endian hosts
Thomas Huth
1
-0
/
+9
2023-04-24
intel_iommu: refine iotlb hash calculation
Jason Wang
1
-3
/
+3
2022-11-07
intel-iommu: PASID support
Jason Wang
1
-2
/
+14
2022-05-16
intel-iommu: block output address in interrupt address range
Jason Wang
1
-0
/
+4
2022-05-16
intel-iommu: remove VTD_FR_RESERVED_ERR
Jason Wang
1
-5
/
+0
2022-03-06
intel_iommu: support snoop control
Jason Wang
1
-0
/
+1
2021-11-29
intel-iommu: ignore leaf SNP bit in scalable mode
Jason Wang
1
-0
/
+2
2020-07-22
intel_iommu: Use correct shift for 256 bits qi descriptor
Liu Yi L
1
-1
/
+2
2020-01-06
intel_iommu: add present bit check for pasid table entries
Liu Yi L
1
-0
/
+1
2019-11-25
intel_iommu: TM field should not be in reserved bits
Qi, Yadong
1
-3
/
+10
2019-11-25
intel_iommu: refine SL-PEs reserved fields checking
Qi, Yadong
1
-4
/
+1
2019-04-02
intel_iommu: Drop extended root field
Peter Xu
1
-1
/
+0
2019-03-12
intel_iommu: add scalable-mode option to make scalable mode work
Yi Sun
1
-0
/
+4
2019-03-12
intel_iommu: add 256 bits qi_desc support
Liu, Yi L
1
-1
/
+8
2019-03-12
intel_iommu: scalable mode emulation
Liu, Yi L
1
-2
/
+39
2018-12-19
intel_iommu: dma read/write draining support
Peter Xu
1
-0
/
+3
2018-01-18
intel-iommu: Extend address width to 48 bits
Prasad Singamsetty
1
-6
/
+3
2018-01-18
intel-iommu: Redefine macros to enable supporting 48 bit address width
Prasad Singamsetty
1
-8
/
+26
2017-08-02
intel_iommu: fix iova for pt
Peter Xu
1
-1
/
+0
2017-06-16
intel_iommu: cleanup vtd_{do_}iommu_translate()
Peter Xu
1
-0
/
+1
2017-05-25
intel_iommu: support passthrough (PT)
Peter Xu
1
-0
/
+1
2017-04-20
intel_iommu: enable remote IOTLB
Peter Xu
1
-0
/
+1
2017-02-17
intel_iommu: add "caching-mode" option
Aviv Ben-David
1
-0
/
+1
2017-01-10
intel_iommu: support device iotlb descriptor
Jason Wang
1
-2
/
+11
2016-11-15
intel_iommu: fixing source id during IOTLB hash key calculation
Jason Wang
1
-1
/
+1
2016-07-21
intel_iommu: support all masks in interrupt entry cache invalidation
Radim Krčmář
1
-0
/
+1
2016-07-21
intel_iommu: Add support for Extended Interrupt Mode
Jan Kiszka
1
-0
/
+2
2016-07-21
x86-iommu: introduce IEC notifiers
Peter Xu
1
-4
/
+20
2016-07-20
intel_iommu: Add support for PCI MSI remap
Peter Xu
1
-0
/
+2
2016-07-20
intel_iommu: add IR translation faults defines
Peter Xu
1
-0
/
+13
2016-07-20
intel_iommu: define interrupt remap table addr register
Peter Xu
1
-0
/
+4
2016-07-20
intel_iommu: set IR bit for ECAP register
Peter Xu
1
-0
/
+2
2016-07-20
intel_iommu: allow queued invalidation for IR
Peter Xu
1
-0
/
+2
2016-02-06
intel_iommu: large page support
Jason Wang
1
-2
/
+4
2014-08-28
intel-iommu: add IOTLB using hash table
Le Tan
1
-1
/
+33
2014-08-28
intel-iommu: add context-cache to cache context-entry
Le Tan
1
-7
/
+16
2014-08-28
intel-iommu: add supports for queued invalidation interface
Le Tan
1
-6
/
+21
2014-08-28
intel-iommu: introduce Intel IOMMU (VT-d) emulation
Le Tan
1
-0
/
+333