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path: root/hw/i386/intel_iommu.c
AgeCommit message (Expand)AuthorFilesLines
2017-02-01intel_iommu: fix and simplify size calculation in process_device_iotlb_desc()Jason Wang1-1/+9
2017-01-10intel_iommu: support device iotlb descriptorJason Wang1-5/+78
2017-01-10intel_iommu: allocate new key when creating new address spaceJason Wang1-2/+3
2017-01-10intel_iommu: name vtd address space with devfnJason Wang1-1/+3
2017-01-10intel_iommu: allow migrationPeter Xu1-1/+21
2016-11-30intel_iommu: fix incorrect device invalidatePeter Xu1-0/+1
2016-11-15intel_iommu: fix incorrect assertPeter Xu1-1/+1
2016-11-15intel_iommu: fix several incorrect endianess and bit fieldsPeter Xu1-1/+1
2016-11-15intel_iommu: fixing source id during IOTLB hash key calculationJason Wang1-1/+1
2016-10-17intel_iommu: reject broken EIMRadim Krčmář1-1/+15
2016-10-17intel_iommu: add OnOffAuto intr_eim as "eim" propertyRadim Krčmář1-3/+21
2016-10-17intel_iommu: redo configuraton check in realizeRadim Krčmář1-8/+18
2016-10-17intel_iommu: pass whole remapped addresses to apicRadim Krčmář1-12/+9
2016-10-10intel-iommu: Check IOAPIC's Trigger Mode against the one in IRTEFeng Wu1-0/+12
2016-09-27intel_iommu, amd_iommu: allow UNMAP notifiersPeter Xu1-4/+8
2016-09-27memory: introduce IOMMUOps.notify_flag_changedPeter Xu1-2/+4
2016-09-24hw/i386: AMD IOMMU IVRS tableDavid Kiarie1-0/+1
2016-07-21intel_iommu: avoid unnamed fieldsMichael S. Tsirkin1-21/+21
2016-07-21intel_iommu: disallow kernel-irqchip=on with IRPeter Xu1-0/+11
2016-07-21intel_iommu: support all masks in interrupt entry cache invalidationRadim Krčmář1-1/+1
2016-07-21intel_iommu: add SID validation for IRPeter Xu1-11/+58
2016-07-21intel_iommu: Add support for Extended Interrupt ModeJan Kiszka1-7/+9
2016-07-21x86-iommu: introduce IEC notifiersPeter Xu1-7/+29
2016-07-21intel_iommu: add support for split irqchipPeter Xu1-0/+7
2016-07-21q35: ioapic: add support for emulated IOAPIC IRPeter Xu1-1/+5
2016-07-21intel_iommu: get rid of {0} initializersMichael S. Tsirkin1-3/+3
2016-07-20intel_iommu: Add support for PCI MSI remapPeter Xu1-0/+239
2016-07-20intel_iommu: handle interrupt remap enablePeter Xu1-0/+20
2016-07-20intel_iommu: define interrupt remap table addr registerPeter Xu1-1/+51
2016-07-20intel_iommu: set IR bit for ECAP registerPeter Xu1-0/+6
2016-07-20intel_iommu: allow queued invalidation for IRPeter Xu1-0/+9
2016-07-20intel_iommu: rename VTD_PCI_DEVFN_MAX to x86-iommuPeter Xu1-4/+7
2016-07-20x86-iommu: introduce parent classPeter Xu1-2/+3
2016-07-04hw/iommu: enable iommu with -deviceMarcel Apfelbaum1-0/+16
2016-06-30intel_iommu: Throw hw_error on notify_startedAlex Williamson1-0/+12
2016-02-06intel_iommu: large page supportJason Wang1-22/+54
2016-01-29x86: Clean up includesPeter Maydell1-0/+1
2015-10-18intel_iommu: Add support for translation for devices behind bridgesKnut Omang1-16/+73
2015-04-26Switch non-CPU callers from ld/st*_phys to address_space_ld/st*Peter Maydell1-1/+2
2015-02-16exec: RCUify AddressSpaceDispatchPaolo Bonzini1-0/+3
2014-08-28intel-iommu: add IOTLB using hash tableLe Tan1-5/+208
2014-08-28intel-iommu: add context-cache to cache context-entryLe Tan1-28/+160
2014-08-28intel-iommu: add supports for queued invalidation interfaceLe Tan1-1/+372
2014-08-28intel-iommu: introduce Intel IOMMU (VT-d) emulationLe Tan1-0/+1257
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