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path: root/hw/dma/xlnx_csu_dma.c
AgeCommit message (Expand)AuthorFilesLines
2023-12-29hw/dma: Constify VMStateRichard Henderson1-1/+1
2023-11-27hw/dma/xlnx_csu_dma: don't throw guest errors when stopping the SRC DMAFrederic Konrad1-4/+8
2023-11-27hw/misc, hw/ssi: Fix some URLs for AMD / Xilinx modelsFrederic Konrad1-1/+1
2023-10-19hw/dma: Declare link using static DEFINE_PROP_LINK() macroPhilippe Mathieu-Daudé1-9/+4
2023-01-18bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plxPhilippe Mathieu-Daudé1-2/+2
2022-05-19ptimer: Rename PTIMER_POLICY_DEFAULT to PTIMER_POLICY_LEGACYPeter Maydell1-1/+1
2022-03-18hw/dma/xlnx_csu_dma: Set TYPE_XLNX_CSU_DMA class_sizePeter Maydell1-0/+1
2022-01-29Merge remote-tracking branch 'remotes/quintela-gitlab/tags/migration-20220128...Peter Maydell1-1/+0
2022-01-28Remove unnecessary minimum_version_id_old fieldsPeter Maydell1-1/+0
2022-01-28hw/dma/xlnx_csu_dma: Support starting a read transfer through a class methodFrancisco Iglesias1-0/+17
2021-08-26hw/dma/xlnx_csu_dma: Always expect 'dma' link property to be setPhilippe Mathieu-Daudé1-11/+10
2021-08-26hw/dma/xlnx_csu_dma: Run trivial checks early in realize()Philippe Mathieu-Daudé1-5/+5
2021-05-02hw: Remove superfluous includes of hw/hw.hThomas Huth1-1/+0
2021-03-08hw/dma: Implement a Xilinx CSU DMA modelXuzhou Cheng1-0/+745