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AgeCommit message (Expand)AuthorFilesLines
2024-07-01hw/cxl/cxl-mailbox-utils: Add superset extent release mailbox supportFan Ni1-13/+8
2024-07-01hw/mem/cxl_type3: Add DPA range validation for accesses to DC regionsFan Ni1-0/+3
2024-07-01hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extentsFan Ni1-12/+50
2024-07-01hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release dynamic...Fan Ni1-0/+394
2024-07-01hw/mem/cxl_type3: Add DC extent list representative and get DC extent list ma...Fan Ni1-1/+72
2024-07-01hw/mem/cxl_type3: Add host backend and address space handling for DC regionsFan Ni1-5/+11
2024-07-01include/hw/cxl/cxl_device: Rename mem_size as static_mem_size for type3 memor...Fan Ni1-2/+2
2024-07-01hw/cxl/cxl-mailbox-utils: Add dynamic capacity region representative and mail...Fan Ni1-0/+96
2024-07-01hw/cxl/cxl-mailbox-utils: Add dc_event_log_size field to output payload of id...Fan Ni1-1/+4
2024-07-01hw/cxl/mailbox: interface to add CCI commands to an existing CCIGregory Price1-2/+17
2024-07-01hw/cxl/mailbox: change CCI cmd set structure to be a member, not a referenceGregory Price1-4/+15
2024-04-25hw/cxl/cxl-cdat: Make cxl_doe_cdat_init() return booleanZhao Liu1-3/+3
2024-04-25hw/cxl/cxl-cdat: Make ct3_build_cdat() return booleanZhao Liu1-4/+5
2024-04-25hw/cxl/cxl-cdat: Make ct3_load_cdat() return booleanZhao Liu1-6/+7
2024-03-12hw/cxl/cxl-host: Fix missing ERRP_GUARD() in cxl_fixed_memory_window_config()Zhao Liu1-0/+1
2024-03-12hw/pci-bridge/pxb-cxl: Drop RAS capability from host bridge.Jonathan Cameron1-4/+17
2024-03-09hw/cxl/cxl-cdat: Fix type of buf in ct3_load_cdat()Thomas Huth1-2/+2
2024-02-14hw/cxl: Standardize all references on CXL r3.1 and minor updatesJonathan Cameron4-34/+42
2024-02-14hw/cxl: Update mailbox status registers.Jonathan Cameron1-1/+5
2024-02-14hw/cxl: Update RAS Capability Definitions for version 3.Jonathan Cameron1-1/+1
2024-02-14hw/cxl: Update HDM Decoder capability to version 3Jonathan Cameron1-1/+9
2024-02-14hw/cxl: Pass NULL for a NULL MemoryRegionOpsLi Zhijian1-1/+1
2024-02-14hw/cxl: Pass CXLComponentState to cache_mem_opsLi Zhijian1-1/+1
2024-02-14hw/cxl/device: read from register values in mdev_reg_read()Hyeonggon Yoo1-6/+11
2024-02-14hw/cxl/mbox: Remove dead codeDavidlohr Bueso1-28/+15
2024-02-14cxl/cdat: Fix header sum value in CDAT checksumIra Weiny1-2/+7
2024-02-14cxl/cdat: Handle cdat table build errorsIra Weiny1-1/+1
2024-01-30cxl: Clean up includesPeter Maydell1-3/+1
2023-12-31meson: remove CONFIG_ALLPaolo Bonzini1-2/+0
2023-11-15hw/cxl: spelling fixes: limitaions, potentialy, intializedMichael Tokarev2-3/+3
2023-11-07hw/cxl: Add tunneled command support to mailbox for switch cci.Jonathan Cameron1-0/+162
2023-11-07hw/cxl: Add dummy security state getJonathan Cameron1-0/+17
2023-11-07hw/cxl/mbox: Add Get Background Operation Status CommandJonathan Cameron1-0/+33
2023-11-07hw/cxl: Add support for device sanitationDavidlohr Bueso1-0/+140
2023-11-07hw/cxl/mbox: Wire up interrupts for background completionDavidlohr Bueso2-18/+23
2023-11-07hw/cxl/mbox: Add support for background operationsDavidlohr Bueso2-4/+112
2023-11-07hw/cxl: Implement Physical Ports status retrievalJonathan Cameron1-0/+128
2023-11-07hw/cxl/mbox: Add Physical Switch Identify command.Jonathan Cameron1-0/+65
2023-11-07hw/cxl/mbox: Add Information and Status / Identify commandJonathan Cameron1-0/+55
2023-11-07hw/cxl: Add a switch mailbox CCI functionJonathan Cameron4-0/+157
2023-11-07hw/cxl/mbox: Generalize the CCI command processingJonathan Cameron2-42/+53
2023-11-07hw/cxl/mbox: Pull the CCI definition out of the CXLDeviceStateJonathan Cameron2-44/+81
2023-11-07hw/cxl/mbox: Split mailbox command payload into separate input and outputJonathan Cameron2-96/+136
2023-11-07hw/cxl/mbox: Pull the payload out of struct cxl_cmd and make instances constantJonathan Cameron1-56/+65
2023-11-07hw/cxl: Fix a QEMU_BUILD_BUG_ON() in switch statement scope issue.Jonathan Cameron1-1/+0
2023-11-07hw/cxl: Line length reductionsJonathan Cameron4-17/+30
2023-11-07hw/cxl: CXLDVSECPortExtensions renamed to CXLDVSECPortExtJonathan Cameron1-20/+29
2023-11-07hw/cxl: Use switch statements for read and write of cachemem registersJonathan Cameron1-23/+43
2023-11-07hw/cxl: Use a switch to explicitly check size in caps_reg_read()Jonathan Cameron1-4/+7
2023-10-06hw/cxl: Fix local variable shadowing of cap_hdrsJonathan Cameron1-4/+4
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