| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2022-08-17 | hw/cxl: Fix wrong query of target ports | Jonathan Cameron | 1 | -7/+5 |
| 2022-08-17 | hw/cxl: Fix memory leak in error paths | Jonathan Cameron | 1 | -2/+3 |
| 2022-06-16 | pci-bridge/cxl_downstream: Add a CXL switch downstream port | Jonathan Cameron | 1 | -2/+41 |
| 2022-06-09 | pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup. | Jonathan Cameron | 1 | -0/+20 |
| 2022-06-09 | hw/cxl: Push linking of CXL targets into i386/pc rather than in machine.c | Jonathan Cameron | 1 | -5/+3 |
| 2022-06-09 | hw/cxl: Make the CXL fixed memory window setup a machine parameter. | Jonathan Cameron | 1 | -5/+67 |
| 2022-05-13 | cxl/cxl-host: Add memops for CFMWS region. | Jonathan Cameron | 1 | -0/+128 |
| 2022-05-13 | hw/cxl/host: Add support for CXL Fixed Memory Windows. | Jonathan Cameron | 1 | -0/+94 |
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