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path: root/hw/cpu/a15mpcore.c
AgeCommit message (Expand)AuthorFilesLines
2018-08-24hw/cpu/a15mpcore: If CPU has EL2, enable it on the GIC and wire it upPeter Maydell1-3/+28
2018-07-17hw/cpu/a15mpcore: Fix introspection problem with the a15mpcore_priv deviceThomas Huth1-5/+3
2016-03-22include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster1-0/+1
2016-03-04hw/intc/arm_gic.c: Implement GICv2 GICC_DIRPeter Maydell1-1/+1
2016-01-29hw: Clean up includesPeter Maydell1-0/+1
2015-09-14hw/cpu/{a15mpcore, a9mpcore}: Handle missing has_el3 CPU props gracefullyEdgar E. Iglesias1-1/+1
2015-09-08hw/cpu/{a15mpcore, a9mpcore}: enable TrustZone in GIC if it is enabled in CPUsPeter Maydell1-0/+13
2015-08-13hw/cpu/a15mpcore: Wire up hyp and secure physical timer interruptsPeter Maydell1-7/+14
2015-08-13Introduce gic_class_name() instead of repeating conditionPavel Fedin1-6/+2
2013-11-05a15mpcore: Prepare for QOM embeddingAndreas Färber1-20/+1
2013-11-05a15mpcore: Convert to QOM realizeAndreas Färber1-8/+12
2013-11-05a15mpcore: Embed GICStateAndreas Färber1-15/+24
2013-11-05a15mpcore: Split off instance_initAndreas Färber1-3/+10
2013-09-03a15mpcore: Use qemu_get_cpu() for generic timersAndreas Färber1-3/+2
2013-08-20hw/cpu/a15mpcore: Wire generic timer outputs to GIC inputsPeter Maydell1-0/+18
2013-07-29cpu/a15mpcore: QOM cast cleanupAndreas Färber1-4/+11
2013-07-15hw/cpu/a15mpcore: Correct default value for num-irqPeter Maydell1-2/+2
2013-07-04hw/c*: pass owner to memory_region_init* functionsPaolo Bonzini1-1/+2
2013-07-04memory: add owner argument to initialization functionsPaolo Bonzini1-1/+1
2013-04-08hw: move ARM CPU cores to hw/cpu/, configure with default-configs/Paolo Bonzini1-0/+114