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2024-01-18hw/arm/virt: Consolidate valid CPU typesGavin Shan1-2/+6
2024-01-15hw/arm: Connect STM32L4x5 SYSCFG to STM32L4x5 SoCInès Varhol2-1/+21
2024-01-15hw/arm: Connect STM32L4x5 EXTI to STM32L4x5 SoCInès Varhol2-1/+52
2024-01-11Merge tag 'pull-target-arm-20240111' of https://git.linaro.org/people/pmaydel...Peter Maydell15-0/+367
2024-01-10hw/arm/virt-acpi-build.c: Migrate virtio creation to common locationSunil V L1-28/+4
2024-01-10hw/arm/virt-acpi-build.c: Migrate fw_cfg creation to common locationSunil V L1-17/+2
2024-01-09hw/arm: Add missing QOM parent for v7-M SoCsPhilippe Mathieu-Daudé5-0/+5
2024-01-09hw/arm/socs: configure priority bits for existing SOCsSamuel Tardieu5-0/+6
2024-01-09hw/arm/armv7m: alias the NVIC "num-prio-bits" propertySamuel Tardieu1-0/+2
2024-01-09hw/arm: Add minimal support for the B-L475E-IOT01A boardInès Varhol3-0/+79
2024-01-09hw/arm: Add minimal support for the STM32L4x5 SoCInès Varhol3-0/+271
2024-01-09hw/arm: add cache controller for Freescale i.MX6Nikita Ostrenkov2-0/+4
2024-01-05hw/arm: Simplify memory_region_init_rom() callsPhilippe Mathieu-Daudé3-27/+12
2024-01-05hw: Simplify memory_region_init_ram() callsPhilippe Mathieu-Daudé7-30/+14
2024-01-05hw: Simplify accesses to the CPUState::'start-powered-off' propertyPhilippe Mathieu-Daudé3-16/+6
2024-01-05hw/arm/bcm2836: Use ARM_CPU 'mp-affinity' propertyPhilippe Mathieu-Daudé1-2/+2
2024-01-05hw/arm/bcm2836: Simplify use of 'reset-cbar' propertyPhilippe Mathieu-Daudé1-4/+2
2024-01-05hw/arm: Check CPU type in machine_run_board_init()Gavin Shan8-50/+74
2024-01-05hw/arm/sbsa-ref: Check CPU type in machine_run_board_init()Gavin Shan1-26/+10
2024-01-05hw/arm/virt: Check CPU type in machine_run_board_init()Gavin Shan1-39/+23
2024-01-05hw/arm/virt: Hide host CPU model for tcgGavin Shan1-0/+2
2023-12-29hw/arm: Constify VMStateRichard Henderson15-45/+45
2023-12-20Merge tag 'pull-request-2023-12-20' of https://gitlab.com/thuth/qemu into sta...Stefan Hajnoczi1-1/+8
2023-12-20Merge tag 'pull-target-arm-20231219' of https://git.linaro.org/people/pmaydel...Stefan Hajnoczi1-4/+5
2023-12-20hw: Add compat machines for 9.0Cornelia Huck1-1/+8
2023-12-19hw/arm: Activate IOMMUFD for virt machinesCédric Le Goater1-0/+1
2023-12-19target/arm/kvm: Have kvm_arm_pmu_set_irq take a ARMCPU argumentPhilippe Mathieu-Daudé1-1/+1
2023-12-19target/arm/kvm: Have kvm_arm_pmu_init take a ARMCPU argumentPhilippe Mathieu-Daudé1-1/+1
2023-12-19target/arm/kvm: Have kvm_arm_pvtime_init take a ARMCPU argumentPhilippe Mathieu-Daudé1-2/+3
2023-11-20hw/arm/fsl-imx: Do not ignore Error argumentPhilippe Mathieu-Daudé2-2/+4
2023-11-20hw/arm/stm32f100: Report error when incorrect CPU is usedPhilippe Mathieu-Daudé2-8/+8
2023-11-20hw/arm/stm32f205: Report error when incorrect CPU is usedPhilippe Mathieu-Daudé2-8/+8
2023-11-20hw/arm/stm32f405: Report error when incorrect CPU is usedPhilippe Mathieu-Daudé3-10/+13
2023-11-13hw/arm/virt: fix GIC maintenance IRQ registrationJean-Philippe Brucker1-2/+4
2023-11-10hw/arm/xlnx-versal: Use qdev_prop_set_array()Kevin Wolf1-2/+7
2023-11-10hw/arm/virt: Use qdev_prop_set_array()Kevin Wolf1-14/+17
2023-11-10hw/arm/vexpress: Use qdev_prop_set_array()Kevin Wolf1-10/+11
2023-11-10hw/arm/sbsa-ref: Use qdev_prop_set_array()Kevin Wolf1-2/+5
2023-11-10hw/arm/mps2: Use qdev_prop_set_array()Kevin Wolf1-4/+8
2023-11-10hw/arm/mps2-tz: Use qdev_prop_set_array()Kevin Wolf1-3/+7
2023-11-10Merge tag 'xen-virtio-fix-1-tag' of https://gitlab.com/sstabellini/qemu into ...Stefan Hajnoczi1-1/+3
2023-11-08Merge tag 'misc-cpus-20231107' of https://github.com/philmd/qemu into stagingStefan Hajnoczi1-0/+1
2023-11-07Xen: Fix xen_set_irq() and xendevicemodel_set_irq_level()Vikram Garhwal1-1/+3
2023-11-07hw/sensor: add ADM1266 device modelTitus Rwantare1-0/+1
2023-11-07hw/arm: XLNX_VERSAL depends on XLNX_CSU_DMAMarc-André Lureau1-0/+1
2023-11-07arm/kconfig: XLNX_ZYNQMP_ARM depends on PIXMANMarc-André Lureau1-1/+2
2023-11-07Merge tag 'pull-target-arm-20231106' of https://git.linaro.org/people/pmaydel...Stefan Hajnoczi3-14/+7
2023-11-06hw/arm/vexpress-a9: Remove useless mapping of RAM at address 0Peter Maydell1-11/+3
2023-11-06hw/arm/virt: Report correct register sizes in ACPI DBG2/SPCR tables.Udo Steinberg1-2/+2
2023-11-06hw/arm/virt: fix PMU IRQ registrationSebastian Ott1-1/+2
generated by cgit v1.1 at 2024-08-05 09:18:58 +0000