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path: root/hw/arm/xlnx-versal.c
AgeCommit message (Expand)AuthorFilesLines
2022-04-21hw/arm: versal: Connect the CRLEdgar E. Iglesias1-2/+52
2022-04-21hw/arm: versal: Add the Cortex-R5FsEdgar E. Iglesias1-0/+36
2022-04-21hw/arm: versal: Create an APU CPU ClusterEdgar E. Iglesias1-1/+8
2022-02-08hw/arm/versal: Let boot.c handle PSCI enablementPeter Maydell1-4/+1
2022-01-28hw/arm/xlnx-versal: Connect the OSPI flash memory controller modelFrancisco Iglesias1-0/+93
2022-01-28hw/arm/xlnx-versal: Connect Versal's PMC SLCRFrancisco Iglesias1-1/+70
2022-01-28hw/arm/xlnx-versal: 'Or' the interrupts from the BBRAM and RTC modelsFrancisco Iglesias1-2/+26
2021-09-30hw/arm: xlnx-versal-virt: Add Xilinx eFUSE deviceTong Ho1-0/+39
2021-09-30hw/arm: xlnx-versal-virt: Add Xilinx BBRAM deviceTong Ho1-0/+18
2021-08-26hw/arm/xlnx-versal: Add unimplemented APU mmioTong Ho1-0/+2
2021-08-26hw/dma/xlnx-zdma Always expect 'dma' link property to be setPhilippe Mathieu-Daudé1-0/+2
2021-05-02hw: Do not include qemu/log.h if it is not necessaryThomas Huth1-1/+0
2021-03-12hw/arm: versal: Add support for the XRAMsEdgar E. Iglesias1-0/+36
2021-02-11hw/arm: versal: Use nr_apu_cpus in favor of hard coding 2Edgar E. Iglesias1-2/+2
2020-12-15arm: xlnx-versal: Connect usb to virt-versalVikram Garhwal1-0/+26
2020-09-09hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23Bin Meng1-0/+1
2020-07-21hw: Mark nd_table[] misuse in realize methods FIXMEMarkus Armbruster1-0/+1
2020-07-10qom: Put name parameter before value / visitor parameterMarkus Armbruster1-16/+14
2020-06-15qdev: Convert bus-less devices to qdev_realize() with CoccinelleMarkus Armbruster1-1/+1
2020-06-15sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 3Markus Armbruster1-3/+3
2020-06-15sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1Markus Armbruster1-21/+15
2020-06-15sysbus: Convert to sysbus_realize() etc. with CoccinelleMarkus Armbruster1-1/+1
2020-06-15qom: Less verbose object_initialize_child()Markus Armbruster1-3/+2
2020-06-15qdev: Convert uses of qdev_create() with CoccinelleMarkus Armbruster1-2/+2
2020-05-15qom: Drop parameter @errp of object_property_add() & friendsMarkus Armbruster1-1/+1
2020-05-04hw/arm: versal: Add support for the RTCEdgar E. Iglesias1-0/+21
2020-05-04hw/arm: versal: Add support for SDEdgar E. Iglesias1-0/+31
2020-05-04hw/arm: versal: Embed the APUs into the SoC typeEdgar E. Iglesias1-14/+5
2020-05-04hw/arm: versal: Embed the ADMAs into the SoC typeEdgar E. Iglesias1-7/+7
2020-05-04hw/arm: versal: Embed the GEMs into the SoC typeEdgar E. Iglesias1-7/+8
2020-05-04hw/arm: versal: Embed the UARTs into the SoC typeEdgar E. Iglesias1-6/+6
2020-05-04hw/arm: versal: Move misplaced commentEdgar E. Iglesias1-1/+1
2020-05-04hw/arm: versal: Remove inclusion of arm_gicv3_common.hEdgar E. Iglesias1-1/+0
2020-04-30hw/arm: versal: Setup the ADMA with 128bit bus-widthEdgar E. Iglesias1-0/+2
2020-03-05hw/arm: versal: Add support for the LPD ADMAsEdgar E. Iglesias1-0/+24
2020-02-28hw/arm: Use TYPE_PL011 to create serial portGavin Shan1-1/+2
2020-01-24qdev: set properties with device_class_set_props()Marc-André Lureau1-1/+1
2019-11-26hw/arm: versal: Add the CRP as unimplementedEdgar E. Iglesias1-0/+2
2019-06-12Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster1-1/+1
2019-05-23arm: Rename hw/arm/arm.h to hw/arm/boot.hPeter Maydell1-1/+1
2018-11-02hw/arm: versal: Add a model of Xilinx Versal SoCEdgar E. Iglesias1-0/+323
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