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path: root/hw/arm/aspeed_ast2600.c
AgeCommit message (Expand)AuthorFilesLines
2024-03-25aspeed: Make the ast2600-a3 SoC not user creatableCédric Le Goater1-0/+2
2024-02-27aspeed: fix hardcode boot address 0Jamin Lin1-1/+1
2024-02-27aspeed: introduce a new UART0 device nameJamin Lin1-0/+1
2024-02-01hw/arm: Hook up FSI module in AST2600Ninad Palsule1-0/+19
2024-02-01hw/arm/aspeed: Check for CPU types in machine_run_board_init()Philippe Mathieu-Daudé1-1/+5
2024-02-01hw/arm/aspeed: Introduce aspeed_soc_cpu_type() helperPhilippe Mathieu-Daudé1-1/+2
2024-01-26target/arm: Move ARM_CPU_IRQ/FIQ definitions to 'cpu-qom.h' headerPhilippe Mathieu-Daudé1-0/+1
2024-01-05hw: Simplify memory_region_init_ram() callsPhilippe Mathieu-Daudé1-4/+2
2023-10-25hw/arm/aspeed: Move AspeedSoCState::a7mpcore to Aspeed2600SoCStatePhilippe Mathieu-Daudé1-23/+26
2023-10-25hw/arm/aspeed: Introduce TYPE_ASPEED2600_SOCPhilippe Mathieu-Daudé1-13/+13
2023-09-29aspeed: Clean up local variable shadowingCédric Le Goater1-5/+5
2023-06-15target/arm: Allow users to set the number of VFP registersCédric Le Goater1-0/+2
2023-03-02aspeed: Introduce a spi_boot region under the SoCCédric Le Goater1-0/+13
2023-02-07hw/watchdog/wdt_aspeed: Rename MMIO region size as 'iosize'Philippe Mathieu-Daudé1-2/+2
2022-10-24ast2600: Drop NEON from the CPU featuresCédric Le Goater1-0/+2
2022-07-14aspeed: Refactor UART init for multi-SoC machinesPeter Delevoryas1-1/+7
2022-07-14aspeed: Create SRAM name from first CPU indexPeter Delevoryas1-2/+3
2022-06-30hw/misc/aspeed: Add PECI controllerPeter Delevoryas1-0/+13
2022-06-30aspeed: Remove use of qemu_get_cpuPeter Delevoryas1-1/+1
2022-06-30aspeed: Map unimplemented devices in SoC memoryPeter Delevoryas1-9/+18
2022-06-30aspeed: Remove usage of sysbus_mmio_mapPeter Delevoryas1-24/+27
2022-06-30aspeed: Add memory property to Aspeed SoCPeter Delevoryas1-2/+2
2022-06-30aspeed: Set CPU memory property explicitlyPeter Delevoryas1-0/+2
2022-06-30aspeed: Set the dram container at the SoC levelCédric Le Goater1-2/+5
2022-05-25hw: aspeed: Introduce common UART init functionPeter Delevoryas1-5/+2
2022-05-25hw: aspeed: Add uarts_num SoC attributePeter Delevoryas1-0/+1
2022-05-25hw: aspeed: Add missing UART'sPeter Delevoryas1-0/+19
2022-05-25aspeed: Introduce a get_irq AspeedSoCClass methodCédric Le Goater1-2/+3
2022-05-02aspeed: Add eMMC Boot Controller stubJoel Stanley1-0/+6
2022-03-08aspeed/smc: Remove 'num_cs' fieldCédric Le Goater1-2/+0
2022-02-26ast2600: Add Secure Boot Controller modelJoel Stanley1-0/+9
2022-01-28hw/arm: ast2600: Fix address mapping of second SPI controllerCédric Le Goater1-1/+1
2022-01-20hw/arm/aspeed: Add the i3c device to the AST2600 SoCTroy Lee1-0/+16
2022-01-07Add dummy Aspeed AST2600 Display Port MCU (DPMCU)Troy Lee1-0/+8
2021-10-12hw/arm: Integrate ADC model into Aspeed SoCAndrew Jeffery1-0/+11
2021-10-12aspeed/i2c: QOMify AspeedI2CBusCédric Le Goater1-5/+2
2021-10-12aspeed/smc: Drop AspeedSMCController structureCédric Le Goater1-2/+2
2021-09-20hw/arm/aspeed: Allow machine to set UART defaultPeter Delevoryas1-4/+4
2021-09-20aspeed: Emulate the AST2600A3Joel Stanley1-3/+3
2021-05-05Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pul...Peter Maydell1-3/+0
2021-05-02Do not include exec/address-spaces.h if it's not really necessaryThomas Huth1-1/+0
2021-05-02Do not include cpu.h if it's not really necessaryThomas Huth1-1/+0
2021-05-02hw: Do not include qemu/log.h if it is not necessaryThomas Huth1-1/+0
2021-05-01hw/misc/aspeed_xdma: Add AST2600 supportCédric Le Goater1-1/+2
2021-05-01aspeed: Integrate HACEJoel Stanley1-0/+15
2021-05-01aspeed/smc: Remove unused "sdram-base" propertyCédric Le Goater1-4/+0
2021-03-09hw/misc: Model KCS devices in the Aspeed LPC controllerAndrew Jeffery1-1/+27
2021-03-09hw/misc: Add a basic Aspeed LPC controller modelCédric Le Goater1-0/+10
2021-03-09hw/arm: ast2600: Correct the iBT interrupt IDAndrew Jeffery1-1/+1
2021-03-09hw/arm: ast2600: Set AST2600_MAX_IRQ to value from datasheetAndrew Jeffery1-1/+1
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