riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-06-05	disas/riscv: Use GString in format_inst	Richard Henderson	1	-117/+92
2024-06-05	disas/microblaze: Split get_field_special	Richard Henderson	1	-81/+61
2024-06-05	disas/microblaze: Print registers directly with PRIrfsl	Richard Henderson	1	-17/+5
2024-06-05	disas/microblaze: Print immediates directly with PRIimm	Richard Henderson	1	-50/+11
2024-06-05	disas/microblaze: Print registers directly with PRIreg	Richard Henderson	1	-31/+23
2024-06-05	disas/microblaze: Merge op->name output into each fprintf	Richard Henderson	1	-40/+40
2024-06-05	disas/microblaze: Re-indent print_insn_microblaze	Richard Henderson	1	-123/+142
2024-06-05	disas/microblaze: Split out print_immval_addr	Richard Henderson	1	-60/+29
2024-06-04	Merge tag 'hw-misc-accel-20240604' of https://github.com/philmd/qemu into sta...	Richard Henderson	2	-10/+17
2024-06-04	disas/microblaze: Replace sprintf() by snprintf()	Philippe Mathieu-Daudé	1	-9/+16
2024-06-04	disas/m68k: Replace sprintf() by snprintf()	Philippe Mathieu-Daudé	1	-1/+1
2024-06-03	disas/riscv: Decode all of the pmpcfg and pmpaddr CSRs	Alistair Francis	1	-1/+64
2024-05-15	disas: Use translator_st to get disassembly data	Richard Henderson	3	-16/+32
2024-05-15	disas: Split disas.c	Richard Henderson	7	-340/+378
2024-04-26	exec: Declare target_words_bigendian() in 'exec/tswap.h'	Philippe Mathieu-Daudé	1	-0/+1
2024-04-24	target/nios2: Remove the deprecated Nios II target	Philippe Mathieu-Daudé	2	-3515/+0
2024-04-08	nanomips: fix warnings with GCC 14	Paolo Bonzini	1	-97/+97
2024-03-29	disas: Show opcodes for target_disas and monitor_disas	Richard Henderson	2	-0/+2
2024-03-06	target/riscv: honour show_opcodes when disassembling	Alex Bennée	1	-13/+15
2024-03-06	disas/hppa: honour show_opcodes	Alex Bennée	1	-3/+5
2024-03-06	disas: introduce show_opcodes	Alex Bennée	1	-0/+1
2024-02-11	disas/hppa: Add disassembly for qemu specific instructions	Helge Deller	1	-0/+4
2024-01-30	disas/riscv: Clean up includes	Peter Maydell	3	-1/+2
2024-01-10	disas/riscv: Add amocas.[w,d,q] instructions	Rob Bradford	1	-0/+9
2023-11-24	disas/cris: Pass buffer size to format_dec() to avoid overflow warning	Philippe Mathieu-Daudé	1	-10/+16
2023-11-17	disas/hppa: Show hexcode of instruction along with disassembly	Helge Deller	1	-1/+5
2023-11-07	disas/riscv: Replace TABs with space	Max Chou	1	-3/+3
2023-11-07	disas/riscv: Add support for vector crypto extensions	Max Chou	1	-0/+137
2023-11-07	disas/riscv: Add rv_codec_vror_vi for vror.vi	Max Chou	2	-1/+14
2023-11-07	disas/riscv: Add rv_fmt_vd_vs2_uimm format	Max Chou	1	-0/+1
2023-10-12	disas/riscv: Fix the typo of inverted order of pmpaddr13 and pmpaddr14	Alvin Chang	1	-2/+2
2023-09-29	disas/m68k: clean up local variable shadowing	Laurent Vivier	1	-4/+4
2023-07-19	riscv/disas: Fix disas output of upper immediates	Christoph Müllner	2	-3/+18
2023-07-10	riscv: Add support for the Zfa extension	Christoph Müllner	2	-0/+142
2023-07-10	target/riscv: Add disas support for BF16 extensions	Weiwei Li	1	-0/+44
2023-07-10	disas/riscv: Add support for XThead* instructions	Christoph Müllner	5	-0/+817
2023-07-10	disas/riscv: Add support for XVentanaCondOps	Christoph Müllner	4	-1/+67
2023-07-10	disas/riscv: Provide infrastructure for vendor extensions	Christoph Müllner	1	-2/+26
2023-07-10	disas/riscv: Encapsulate opcode_data into decode	Christoph Müllner	2	-17/+25
2023-07-10	disas/riscv: Make rv_op_illegal a shared enum value	Christoph Müllner	2	-1/+5
2023-07-10	disas/riscv: Move types/constants to new header file	Christoph Müllner	2	-269/+283
2023-06-20	meson: Replace softmmu_ss -> system_ss	Philippe Mathieu-Daudé	1	-1/+1
2023-06-13	disas/riscv.c: Remove redundant parentheses	Weiwei Li	1	-109/+110
2023-06-13	disas/riscv.c: Fix lines with over 80 characters	Weiwei Li	1	-61/+140
2023-06-13	disas/riscv.c: Remove unused decomp_rv32/64 value for vector instructions	Weiwei Li	1	-370/+370
2023-06-13	disas/riscv.c: Support disas for Z*inx extensions	Weiwei Li	1	-4/+12
2023-06-13	disas/riscv.c: Support disas for Zcm* extensions	Weiwei Li	1	-1/+7
2023-06-13	target/riscv: Pass RISCVCPUConfig as target_info to disassemble_info	Weiwei Li	1	-3/+7
2023-05-25	disas/riscv: Decode czero.{eqz,nez}	Richard Henderson	1	-0/+6
2023-05-11	disas: Move disas.c into the target-independent source set	Thomas Huth	2	-7/+8