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AgeCommit message (Expand)AuthorFilesLines
2017-05-11cputlb: handle first atomic write to the pageNikunj A Dadhania1-1/+7
2017-02-28cputlb: Don't assume do_unassigned_access() never returnsPeter Maydell1-8/+7
2017-02-24cputlb: introduce tlb_flush_*_all_cpus[_synced]Alex Bennée1-6/+102
2017-02-24cputlb: atomically update tlb fields used by tlb_reset_dirtyAlex Bennée1-25/+95
2017-02-24cputlb: add tlb_flush_by_mmuidx async routinesAlex Bennée1-22/+88
2017-02-24cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmapAlex Bennée1-37/+23
2017-02-24cputlb: introduce tlb_flush_* async work.KONRAD Frederic1-2/+64
2017-02-24cputlb: tweak qemu_ram_addr_from_host_nofail reportingAlex Bennée1-12/+12
2017-02-24cputlb: add assert_cpu_is_self checksAlex Bennée1-1/+17
2017-02-24tcg: drop global lock during TCG code executionJan Kiszka1-1/+20
2017-01-13cputlb: drop flush_global flag from tlb_flushAlex Bennée1-15/+6
2016-10-28clean-up: removed duplicate #includesAnand J1-1/+0
2016-10-26tcg: Add CONFIG_ATOMIC64Richard Henderson1-0/+4
2016-10-26tcg: Add atomic128 helpersRichard Henderson1-0/+5
2016-10-26tcg: Add atomic helpersRichard Henderson1-3/+109
2016-10-26cputlb: Tidy some macrosRichard Henderson1-0/+8
2016-10-26cputlb: Move most of iotlb code out of lineRichard Henderson1-0/+37
2016-10-26cputlb: Move probe_write out of softmmu_template.hRichard Henderson1-0/+21
2016-10-26cputlb: Replace SHIFT with DATA_SIZERichard Henderson1-8/+8
2016-09-16tcg: Merge GETPC and GETRARichard Henderson1-4/+2
2016-07-08cputlb: Add address parameter to VICTIM_TLB_HITSamuel Damashek1-2/+2
2016-07-08cputlb: Move VICTIM_TLB_HIT out of lineRichard Henderson1-0/+29
2016-06-28cputlb: don't cpu_abort() if guest tries to execute outside RAM or RAMPeter Maydell1-2/+37
2016-05-29memory: split memory_region_from_host from qemu_ram_addr_from_hostPaolo Bonzini1-1/+2
2016-05-19cpu: move exec-all.h inclusion out of cpu.hPaolo Bonzini1-0/+1
2016-05-12tcg: Remove needless CPUState::current_tbSergey Fedorov1-13/+0
2016-03-22cputlb: modernise the debug supportAlex Bennée1-44/+44
2016-03-07memory: Drop MemoryRegion.ram_addrFam Zheng1-2/+2
2016-01-29exec: Clean up includesPeter Maydell1-1/+1
2016-01-21exec.c: Pass MemTxAttrs to iotlb_to_region so it uses the right ASPeter Maydell1-2/+4
2016-01-21cputlb.c: Use correct address space when looking up MemoryRegionSectionPeter Maydell1-1/+2
2015-09-16cputlb: Change tlb_set_dirty() arg to cpuPeter Crosthwaite1-1/+2
2015-09-16cputlb: move CPU_LOOP() for tlb_reset() to exec.cPeter Crosthwaite1-15/+12
2015-09-11tlb: Add "ifetch" argument to cpu_mmu_index()Benjamin Herrenschmidt1-1/+1
2015-08-25cputlb: Add functions for flushing TLB for a single MMU indexPeter Maydell1-0/+97
2015-06-05memory: replace cpu_physical_memory_reset_dirty() with test-and-clearStefan Hajnoczi1-2/+2
2015-06-05cputlb: remove useless arguments to tlb_unprotect_code_phys, renamePaolo Bonzini1-2/+1
2015-04-26Add MemTxAttrs to the IOTLBPeter Maydell1-3/+15
2015-04-26Make CPU iotlb a structure rather than a plain hwaddrPeter Maydell1-2/+2
2015-02-16exec: RCUify AddressSpaceDispatchPaolo Bonzini1-2/+6
2015-02-16exec: make iotlb RCU-friendlyPaolo Bonzini1-3/+2
2014-12-16qemu-log: add log category for MMU infoAntony Pavlov1-1/+2
2014-09-01implementing victim TLB for QEMU system emulated TLBXin Tong1-1/+30
2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini1-0/+1
2014-06-05softmmu: move softmmu_template.h out of include/Paolo Bonzini1-8/+8
2014-06-05softmmu: commonize helper definitionsPaolo Bonzini1-2/+16
2014-06-05cputlb: Fix regression with TCG interpreter (bug 1310324)Stefan Weil1-2/+4
2014-03-13cputlb: Change tlb_set_page() argument to CPUStateAndreas Färber1-2/+2
2014-03-13cputlb: Change tlb_flush() argument to CPUStateAndreas Färber1-3/+3
2014-03-13cputlb: Change tlb_flush_page() argument to CPUStateAndreas Färber1-2/+2
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