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path: root/accel/tcg/user-exec.c
AgeCommit message (Expand)AuthorFilesLines
2021-01-02remove TCG includes from common codePaolo Bonzini1-1/+1
2020-12-18accel/tcg/user-exec: silence the compiler warningsChen Qun1-1/+2
2020-10-08accel/tcg: Fix computing of is_write for MIPSKele Huang1-4/+39
2020-09-17qemu/: fix some comment spelling errorszhaolichang1-1/+1
2020-08-21meson: rename included C source files to .c.incPaolo Bonzini1-1/+1
2020-08-21trace: switch position of headers to what Meson requiresPaolo Bonzini1-1/+1
2020-06-02accel/tcg: Provide a NetBSD specific aarch64 cpu_signal_handlerNick Hudson1-0/+27
2020-06-02accel/tcg: Adjust cpu_signal_handler for NetBSD/armNick Hudson1-3/+13
2020-05-11accel/tcg: Add endian-specific cpu_{ld, st}* operationsRichard Henderson1-38/+173
2020-05-11accel/tcg: Add probe_access_flagsRichard Henderson1-9/+34
2020-05-11accel/tcg: Adjust probe_access call to page_check_rangeRichard Henderson1-1/+1
2020-01-15tcg: Search includes from the project root source directoryPhilippe Mathieu-Daudé1-1/+1
2020-01-15cputlb: Expand cpu_ldst_useronly_template.h in user-exec.cRichard Henderson1-0/+236
2019-10-28atomic_template: add inline trace/plugin helpersEmilio G. Cota1-0/+2
2019-10-28trace: add mmu_index to mem_infoAlex Bennée1-0/+1
2019-09-03tcg: Factor out probe_write() logic into probe_access()David Hildenbrand1-6/+20
2019-09-03tcg: Make probe_write() return a pointer to the host pageDavid Hildenbrand1-2/+4
2019-09-03tcg: Enforce single page access in probe_write()David Hildenbrand1-0/+2
2019-09-03tcg: Factor out CONFIG_USER_ONLY probe_write() from s390x codeDavid Hildenbrand1-0/+14
2019-07-14tcg: Release mmap_lock on translation faultRichard Henderson1-19/+47
2019-07-14tcg: Introduce set/clear_helper_retaddrRichard Henderson1-5/+6
2019-06-10cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson1-1/+1
2019-05-10tcg: Remove CPUClass::handle_mmu_faultRichard Henderson1-10/+3
2019-05-10tcg: Add CPUClass::tlb_fillRichard Henderson1-25/+14
2019-01-30tcg: Fix LGPL version numberThomas Huth1-1/+1
2019-01-29accel/tcg/user-exec: Don't parse aarch64 insns to test for read vs writePeter Maydell1-14/+52
2018-12-26tcg: Add RISC-V cpu signal handlerAlistair Francis1-0/+75
2018-10-18tcg: Split CONFIG_ATOMIC128Richard Henderson1-2/+3
2018-04-11icount: fix cpu_restore_state_from_tb for non-tb-exit casesPavel Dovgalyuk1-1/+1
2018-02-05Drop remaining bits of ia64 host supportPeter Maydell1-33/+0
2018-01-25accel/tcg: add size paremeter in tlb_fill()Laurent Vivier1-1/+1
2018-01-23page_unprotect(): handle calls to pages that are PAGE_WRITEPeter Maydell1-1/+12
2018-01-23linux-user: Propagate siginfo_t through to handle_cpu_signal()Peter Maydell1-25/+14
2017-11-21accel/tcg: Handle atomic accesses to notdirty memory correctlyPeter Maydell1-0/+1
2017-11-15tcg: Record code_gen_buffer address for user-only memory helpersRichard Henderson1-11/+47
2017-09-17accel/tcg: move USER code to user-exec.cPhilippe Mathieu-Daudé1-0/+52
2017-09-17accel/tcg: move user-exec to accel/tcg/Philippe Mathieu-Daudé1-0/+575
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