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path: root/accel/tcg/cputlb.c
AgeCommit message (Expand)AuthorFilesLines
2019-11-11Remove unassigned_access CPU hookPeter Maydell1-2/+0
2019-10-30Merge remote-tracking branch 'remotes/stsquad/tags/pull-tcg-plugins-281019-4'...Peter Maydell1-1/+59
2019-10-28cputlb: ensure _cmmu helper functions follow the naming standardAlex Bennée1-3/+21
2019-10-28plugins: implement helpers for resolving hwaddrAlex Bennée1-0/+42
2019-10-28atomic_template: add inline trace/plugin helpersEmilio G. Cota1-0/+2
2019-10-28cputlb: introduce get_page_addr_code_hostpEmilio G. Cota1-1/+13
2019-10-28trace: add mmu_index to mem_infoAlex Bennée1-0/+2
2019-10-28cputlb: Fix tlb_vaddr_to_hostRichard Henderson1-1/+1
2019-10-28cputlb: ensure _cmmu helper functions follow the naming standardAlex Bennée1-3/+21
2019-09-25cputlb: Pass retaddr to tb_invalidate_phys_page_fastRichard Henderson1-5/+1
2019-09-25cputlb: Remove cpu->mem_io_vaddrRichard Henderson1-2/+0
2019-09-25cputlb: Handle TLB_NOTDIRTY in probe_accessRichard Henderson1-9/+17
2019-09-25cputlb: Merge and move memory_notdirty_write_{prepare,complete}Richard Henderson1-34/+42
2019-09-25cputlb: Partially inline memory_region_section_get_iotlbRichard Henderson1-24/+42
2019-09-25cputlb: Move NOTDIRTY handling from I/O path to TLB pathRichard Henderson1-3/+23
2019-09-25cputlb: Move ROM handling from I/O path to TLB pathRichard Henderson1-15/+21
2019-09-25cputlb: Introduce TLB_BSWAPRichard Henderson1-29/+43
2019-09-25cputlb: Split out load/store_memopRichard Henderson1-52/+55
2019-09-25cputlb: Use qemu_build_not_reached in load/store_helpersRichard Henderson1-3/+2
2019-09-25cputlb: Disable __always_inline__ without optimizationRichard Henderson1-2/+2
2019-09-03tcg: Factor out probe_write() logic into probe_access()David Hildenbrand1-11/+32
2019-09-03tcg: Make probe_write() return a pointer to the host pageDavid Hildenbrand1-5/+16
2019-09-03tcg: Enforce single page access in probe_write()David Hildenbrand1-0/+2
2019-09-03tcg: Check for watchpoints in probe_write()David Hildenbrand1-2/+13
2019-09-03cputlb: Handle watchpoints via TLB_WATCHPOINTRichard Henderson1-10/+79
2019-09-03cputlb: Remove double-alignment in store_helperRichard Henderson1-2/+1
2019-09-03cputlb: Fix size operand for tlb_fill on unaligned storeRichard Henderson1-1/+4
2019-09-03cputlb: Fold TLB_RECHECK into TLB_INVALID_MASKRichard Henderson1-63/+23
2019-09-03cputlb: Byte swap memory transaction attributeTony Nguyen1-0/+12
2019-09-03memory: Single byte swap along the I/O pathTony Nguyen1-39/+3
2019-09-03cputlb: Replace size and endian operands for MemOpTony Nguyen1-89/+81
2019-09-03memory: Access MemoryRegion with endiannessTony Nguyen1-2/+6
2019-09-03cputlb: Access MemoryRegion with MemOpTony Nguyen1-4/+4
2019-09-03tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen1-1/+1
2019-06-12cputlb: cast size_t to target_ulong before using for address masksAlex Bennée1-1/+1
2019-06-12cputlb: use uint64_t for interim values for unaligned loadAlex Bennée1-1/+1
2019-06-10cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson1-19/+19
2019-06-10tcg: Create struct CPUTLBRichard Henderson1-76/+88
2019-06-10tcg: Fold CPUTLBWindow into CPUTLBDescRichard Henderson1-12/+12
2019-05-16Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190510' into stagingPeter Maydell1-8/+80
2019-05-10cputlb: Do unaligned store recursion to outermost functionRichard Henderson1-4/+4
2019-05-10cputlb: Do unaligned load recursion to outermost functionRichard Henderson1-20/+97
2019-05-10cputlb: Drop attribute flattenRichard Henderson1-63/+42
2019-05-10cputlb: Move TLB_RECHECK handling into load/store_helperRichard Henderson1-71/+55
2019-05-10accel/tcg: demacro cputlbAlex Bennée1-26/+452
2019-05-10tcg: Use tlb_fill probe from tlb_vaddr_to_hostRichard Henderson1-8/+61
2019-05-10tcg: Use CPUClass::tlb_fill in cputlb.cRichard Henderson1-0/+19
2019-04-25cputlb: Fix io_readx() to respect the access_typeShahab Vahedi1-2/+3
2019-02-11cputlb: update TLB entry/index after tlb_fillEmilio G. Cota1-0/+4
2019-01-30tcg: Fix LGPL version numberThomas Huth1-1/+1
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