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2014-01-08char/cadence_uart: s/r_fifo/rx_fifoPeter Crosthwaite1-4/+4
2014-01-08char/cadence_uart: Fix reset.Peter Crosthwaite1-3/+4
2014-01-08char/cadence_uart: Add missing uart_update_statePeter Crosthwaite1-0/+1
2014-01-08char/cadence_uart: Mark struct fields as public/privatePeter Crosthwaite1-0/+2
2014-01-08target-arm: Give the FPSCR rounding modes namesAlexander Graf2-4/+13
2014-01-08target-arm: A64: Add support for floating point cond selectClaudio Fontana1-1/+44
2014-01-08target-arm: A64: Add support for floating point conditional compareClaudio Fontana1-1/+34
2014-01-08target-arm: A64: Add support for floating point compareClaudio Fontana3-1/+113
2014-01-08target-arm: A64: Add fmov (scalar, immediate) instructionAlexander Graf1-1/+31
2014-01-08target-arm: A64: Add "Floating-point data-processing (3 source)" insnsAlexander Graf1-1/+94
2014-01-08target-arm: A64: Add "Floating-point data-processing (2 source)" insnsAlexander Graf1-1/+181
2014-01-08target-arm: Use VFP_BINOP macro for min, max, minnum, maxnumPeter Maydell4-52/+20
2014-01-08target-arm: A64: Fix vector register access on bigendian hostsPeter Maydell1-34/+35
2014-01-08target-arm: A64: Add support for dumping AArch64 VFP register stateAlexander Graf1-0/+16
2014-01-08default-configs: Add config for aarch64-linux-userPeter Maydell1-0/+3
2014-01-08.travis.yml: Add aarch64-* targetsAlex Bennée1-0/+1
2014-01-08linux-user: AArch64: Use correct values for FPSR/FPCR in sigcontextWill Newton1-3/+7
2014-01-08linux-user: AArch64: define TARGET_CLONE_BACKWARDSClaudio Fontana1-0/+1
2014-01-08target-arm: A64: support for ld/st/cl exclusiveMichael Matz2-6/+277
2014-01-08target-arm: Widen exclusive-access support struct fields to 64 bitsPeter Maydell4-46/+64
2014-01-08target-arm: aarch64: add support for ld litAlexander Graf1-2/+45
2014-01-08target-arm: A64: add support for conditional compare insnsClaudio Fontana1-13/+60
2014-01-08target-arm: A64: add support for add/sub with carryClaudio Fontana1-2/+103
2014-01-07target-i386: Tidy ljmpRichard Henderson1-2/+1
2014-01-07target-i386: Rename gen_op_jmp_T0 to gen_op_jmp_vRichard Henderson1-9/+9
2014-01-07target-i386: Tidy some size computationRichard Henderson1-3/+3
2014-01-07target-i386: Remove gen_op_mov_reg_A0Richard Henderson1-6/+1
2014-01-07target-i386: Remove gen_op_mov_TN_regRichard Henderson1-64/+59
2014-01-07target-i386: Remove gen_op_addl_T0_T1Richard Henderson1-8/+3
2014-01-07target-i386: Remove gen_op_mov_reg_T1Richard Henderson1-18/+13
2014-01-07target-i386: Remove gen_op_mov_reg_T0Richard Henderson1-70/+65
2014-01-07target-i386: Tidy cpu_regs initializationRichard Henderson1-51/+36
2014-01-07target_i386: Clean up gen_pop_T0Richard Henderson1-47/+37
2014-01-07target-i386: Combine gen_push_T* into gen_push_vRichard Henderson1-74/+32
2014-01-07target-i386: Tidy addr16 code in gen_lea_modrmRichard Henderson1-18/+16
2014-01-07target-i386: Change dflag to TCGMemOpRichard Henderson1-284/+216
2014-01-07target-i386: Change gen_op_mov_reg_A0 size parameter to TCGMemOpRichard Henderson1-24/+8
2014-01-07target-i386: Change aflag to TCGMemOpRichard Henderson1-91/+87
2014-01-07target-i386: Change gen_op_j*z_ecx size parameter to TCGMemOpRichard Henderson1-10/+10
2014-01-07target-i386: Change gen_op_add_reg_* size parameter to TCGMemOpRichard Henderson1-54/+22
2014-01-07target-i386: Use TCGMemOp for 'ot' variablesRichard Henderson1-50/+70
2014-01-07target-i386: Remove gen_op_andl_A0_ffffRichard Henderson1-20/+13
2014-01-07target-i386: Remove gen_op_movl_T0_T1Richard Henderson1-6/+1
2014-01-07target-i386: Remove gen_op_andl_T0_imRichard Henderson1-11/+9
2014-01-07target-i386: Remove gen_op_andl_T0_ffffRichard Henderson1-25/+18
2014-01-07target-i386: Remove gen_movtl_T*_imRichard Henderson1-13/+3
2014-01-07target-i386: Remove gen_op_mov*_A0_imRichard Henderson1-15/+2
2014-01-07target-i386: Remove gen_op_movl_T0_im*Richard Henderson1-20/+10
2014-01-07target-i386: Remove gen_op_movl_T0_im*Richard Henderson1-22/+10
2014-01-07target-i386: Remove gen_op_movl_T0_0Richard Henderson1-11/+6
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