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2020-05-28hw/display/edid: Add missing 'qdev-properties.h' headerPhilippe Mathieu-Daudé1-0/+1
When trying to consume the DEFINE_EDID_PROPERTIES() macro by including "hw/display/edid.h", we get this build failure: include/hw/display/edid.h:24:5: error: implicit declaration of function ‘DEFINE_PROP_UINT32’ [-Werror=implicit-function-declaration] 24 | DEFINE_PROP_UINT32("xres", _state, _edid_info.prefx, 0), \ | ^~~~~~~~~~~~~~~~~~ Headers should be self-contained, and one shouldn't have to dig to find the missing headers. In this case "hw/qdev-properties.h" is missing. Add it. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200526062252.19852-2-f4bug@amsat.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-05-26Merge remote-tracking branch ↵Peter Maydell18-79/+141
'remotes/philmd-gitlab/tags/mips-hw-next-20200526' into staging MIPS hardware updates - MAINTAINERS updated to welcome Huacai Chen and Jiaxun Yang, and update Aleksandar Rikalo's email address, - Trivial improvements in the Bonito64 North Bridge and the Fuloong 2e machine, - MIPS Machines names unified without 'mips_' prefix. CI: https://travis-ci.org/github/philmd/qemu/builds/691247975 # gpg: Signature made Tue 26 May 2020 14:32:08 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/mips-hw-next-20200526: MAINTAINERS: Change Aleksandar Rikalo's email address hw/mips/mips_int: De-duplicate KVM interrupt delivery hw/mips/malta: Add some logging for bad register offset cases hw/mips: Rename malta/mipssim/r4k/jazz files hw/mips/fuloong2e: Fix typo in Fuloong machine name hw/mips/fuloong2e: Move code and update a comment hw/pci-host/bonito: Set the Config register reset value with FIELD_DP32 hw/pci-host/bonito: Better describe the I/O CS regions hw/pci-host/bonito: Map the different PCI ranges more detailed hw/pci-host/bonito: Map all the Bonito64 I/O range hw/pci-host/bonito: Map peripheral using physical address hw/pci-host/bonito: Fix DPRINTF() format strings hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North Bridge MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-26Merge remote-tracking branch 'remotes/gkurz/tags/9p-next-2020-05-26' into ↵Peter Maydell4-46/+49
staging - fix build with musl libc - fix potential deadlock of QEMU main event loop (cannot be hit with linux client) - revert 9pfs reply truncation (LP 1877688) - xen backend waits for client to free space on the reply ring instead of truncating or disconnecting # gpg: Signature made Tue 26 May 2020 10:36:23 BST # gpg: using RSA key B4828BAF943140CEF2A3491071D4D5E5822F73D6 # gpg: Good signature from "Greg Kurz <groug@kaod.org>" [full] # gpg: aka "Gregory Kurz <gregory.kurz@free.fr>" [full] # gpg: aka "[jpeg image of size 3330]" [full] # Primary key fingerprint: B482 8BAF 9431 40CE F2A3 4910 71D4 D5E5 822F 73D6 * remotes/gkurz/tags/9p-next-2020-05-26: xen/9pfs: increase max ring order to 9 xen/9pfs: yield when there isn't enough room on the ring Revert "9p: init_in_iov_from_pdu can truncate the size" 9p: Lock directory streams with a CoMutex 9pfs: include linux/limits.h for XATTR_SIZE_MAX Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-26MAINTAINERS: Change Aleksandar Rikalo's email addressAleksandar Markovic2-7/+8
Aleksandar Rikalo wants to use a different email address from now on. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-id: <20200518200920.17344-18-aleksandar.qemu.devel@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-05-26hw/mips/mips_int: De-duplicate KVM interrupt deliveryPhilippe Mathieu-Daudé1-8/+3
Refactor duplicated code in a single place. Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20200429082916.10669-2-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-05-26hw/mips/malta: Add some logging for bad register offset casesAleksandar Markovic1-8/+6
Log the cases where a guest attempts read or write using bad register offset. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-id: <20200518200920.17344-21-aleksandar.qemu.devel@gmail.com> [PMD: Replaced TARGET_FMT_lx by HWADDR_PRIX] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-05-26hw/mips: Rename malta/mipssim/r4k/jazz filesAleksandar Markovic6-8/+8
Machine file names should not have prefix "mips_". Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-id: <20200518200920.17344-22-aleksandar.qemu.devel@gmail.com> [PMD: Fixed Fuloong line conflict due to rebase] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-05-26hw/mips/fuloong2e: Fix typo in Fuloong machine namePhilippe Mathieu-Daudé10-32/+38
We always miswrote the Fuloong machine... Fix its name. Add an machine alias to the previous name for backward compatibility. Suggested-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-id: <20200526104726.11273-11-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-05-26hw/mips/fuloong2e: Move code and update a commentPhilippe Mathieu-Daudé1-3/+2
Move the RAM-related call closer to the RAM creation block, rename the ROM comment. Reviewed-by: Huacai Chen <chenhc@lemote.com> Message-id: <20200510210128.18343-4-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-05-26hw/pci-host/bonito: Set the Config register reset value with FIELD_DP32Philippe Mathieu-Daudé1-1/+20
Describe some bits of the Config registers fields with the registerfields API. Use the FIELD_DP32() macro to set the BONGENCFG register bits at reset. Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-id: <20200510210128.18343-12-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-05-26hw/pci-host/bonito: Better describe the I/O CS regionsPhilippe Mathieu-Daudé1-2/+11
Better describe the I/O CS regions, add the ROMCS region. Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-id: <20200510210128.18343-11-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-05-26hw/pci-host/bonito: Map the different PCI ranges more detailedPhilippe Mathieu-Daudé1-4/+28
Better describe the Bonito64 MEM HI/LO and I/O PCI ranges, add more PCI regions as unimplemented. Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-id: <20200526104726.11273-7-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-05-26hw/pci-host/bonito: Map all the Bonito64 I/O rangePhilippe Mathieu-Daudé2-0/+4
To ease following guest accesses to the Bonito64 chipset, map its I/O range as UnimplementedDevice. We can now see the accesses to unimplemented peripheral using the '-d unimp' command line option. Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-id: <20200510210128.18343-9-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-05-26hw/pci-host/bonito: Map peripheral using physical addressPhilippe Mathieu-Daudé1-2/+2
Peripherals are mapped at physical address on busses. Only CPU/IOMMU can use virtual addresses. Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-id: <20200510210128.18343-8-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-05-26hw/pci-host/bonito: Fix DPRINTF() format stringsPhilippe Mathieu-Daudé1-3/+3
Reviewed-by: Huacai Chen <chenhc@lemote.com> Message-id: <20200510210128.18343-7-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-05-26hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North BridgePhilippe Mathieu-Daudé3-1/+6
Ease the kconfig selection by introducing CONFIG_PCI_BONITO to select the Bonito North Bridge. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: <20200510210128.18343-6-f4bug@amsat.org> Reviewed-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-05-26MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainerHuacai Chen1-0/+2
I submitted the MIPS/fuloong2e support about ten years ago, and after that I became a MIPS kernel developer. Last year, Philippe Mathieu- Daudé asked me that whether I can be a reviewer of MIPS/fuloong2e, and I promised that I will do some QEMU work in the next year (i.e., 2020 and later). I think now (and also in future) I can have some spare time, so I can finally do some real work on QEMU/MIPS. And if possible, I hope I can be a co-maintainer of MIPS/fuloong2e. Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Message-Id: <1586337380-25217-3-git-send-email-chenhc@lemote.com> [PMD: Added Jiaxun Yang as reviewer] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200510210128.18343-2-f4bug@amsat.org>
2020-05-26Merge remote-tracking branch ↵Peter Maydell13-22/+763
'remotes/kraxel/tags/audio-20200526-pull-request' into staging audio: add JACK client audiodev. audio: bugfixes and cleanups. # gpg: Signature made Tue 26 May 2020 08:56:21 BST # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/audio-20200526-pull-request: hw/mips/mips_fulong2e: Remove unused 'audio/audio.h' include audio: Let capture_callback handler use const buffer argument audio: Let audio_sample_to_uint64() use const samples argument audio: fix wavcapture segfault audio/mixeng: fix clang 10+ warning audio/jack: add JACK client audiodev hw/audio/gus: Use AUDIO_HOST_ENDIANNESS definition from 'audio/audio.h' es1370: check total frame count against current frame Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-26hw/mips/mips_fulong2e: Remove unused 'audio/audio.h' includePhilippe Mathieu-Daudé1-1/+0
The Fuloong machine never had to use "audio/audio.h", remove it. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Huacai Chen <chenhc@lemote.com> Message-id: 20200515084209.9419-1-f4bug@amsat.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-05-26audio: Let capture_callback handler use const buffer argumentPhilippe Mathieu-Daudé3-3/+3
The buffer is the captured input to pass to backends. As we should not modify it, mark the argument const. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200505132603.8575-3-f4bug@amsat.org> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-05-26audio: Let audio_sample_to_uint64() use const samples argumentPhilippe Mathieu-Daudé2-3/+3
The samples are the input to convert to u64. As we should not modify them, mark the argument const. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200505132603.8575-2-f4bug@amsat.org> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-05-26audio: fix wavcapture segfaultBruce Rogers1-2/+2
Commit 571a8c522e caused the HMP wavcapture command to segfault when processing audio data in audio_pcm_sw_write(), where a NULL sw->hw->pcm_ops is dereferenced. This fix checks that the pointer is valid before dereferincing it. A similar fix is also made in the parallel function audio_pcm_sw_read(). Fixes: 571a8c522e (audio: split ctl_* functions into enable_* and volume_*) Signed-off-by: Bruce Rogers <brogers@suse.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200521172931.121903-1-brogers@suse.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-05-26audio/mixeng: fix clang 10+ warningVolker Rümelin1-2/+3
The code in CONV_NATURAL_FLOAT() and CLIP_NATURAL_FLOAT() seems to use the constant 2^31-0.5 to convert float to integer and back. But the float type lacks the required precision and the constant used for the conversion is 2^31. This is equiva- lent to a [-1.f, 1.f] <-> [INT32_MIN, INT32_MAX + 1] mapping. This patch explicitly writes down the used constant. The compiler generated code doesn't change. The constant 2^31 has an exact float representation and the clang 10 compiler stops complaining about an implicit int to float conversion with a changed value. A few notes: - The conversion of 1.f to INT32_MAX + 1 doesn't overflow. The type of the destination variable is int64_t. - At a later stage one of the clip_* functions in audio/mixeng_template.h limits INT32_MAX + 1 to the integer range. - The clip_natural_float_* functions in audio/mixeng.c convert INT32_MAX and INT32_MAX + 1 to 1.f. Buglink: https://bugs.launchpad.net/bugs/1878627 Signed-off-by: Volker Rümelin <vr_qemu@t-online.de> Message-id: 20200523201712.23908-1-vr_qemu@t-online.de Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-05-25xen/9pfs: increase max ring order to 9Stefano Stabellini1-1/+1
The max order allowed by the protocol is 9. Increase the max order supported by QEMU to 9 to increase performance. Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com> Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <20200521192627.15259-3-sstabellini@kernel.org> Signed-off-by: Greg Kurz <groug@kaod.org>
2020-05-25xen/9pfs: yield when there isn't enough room on the ringStefano Stabellini1-6/+25
Instead of truncating replies, which is problematic, wait until the client reads more data and frees bytes on the reply ring. Do that by calling qemu_coroutine_yield(). The corresponding qemu_coroutine_enter_if_inactive() is called from xen_9pfs_bh upon receiving the next notification from the client. We need to be careful to avoid races in case xen_9pfs_bh and the coroutine are both active at the same time. In xen_9pfs_bh, wait until either the critical section is over (ring->co == NULL) or until the coroutine becomes inactive (qemu_coroutine_yield() was called) before continuing. Then, simply wake up the coroutine if it is inactive. Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com> Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <20200521192627.15259-2-sstabellini@kernel.org> Signed-off-by: Greg Kurz <groug@kaod.org>
2020-05-25Revert "9p: init_in_iov_from_pdu can truncate the size"Stefano Stabellini4-39/+22
This reverts commit 16724a173049ac29c7b5ade741da93a0f46edff7. It causes https://bugs.launchpad.net/bugs/1877688. Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com> Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <20200521192627.15259-1-sstabellini@kernel.org> Signed-off-by: Greg Kurz <groug@kaod.org>
2020-05-25audio/jack: add JACK client audiodevGeoffrey McRae6-2/+746
This commit adds a new audiodev backend to allow QEMU to use JACK as both an audio sink and source. Signed-off-by: Geoffrey McRae <geoff@hostfission.com> Message-Id: <20200512101603.E3DB73A038E@moya.office.hostfission.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-05-25hw/audio/gus: Use AUDIO_HOST_ENDIANNESS definition from 'audio/audio.h'Philippe Mathieu-Daudé1-7/+1
Use the generic AUDIO_HOST_ENDIANNESS definition instead of a custom one. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200505100750.27332-1-f4bug@amsat.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-05-25es1370: check total frame count against current framePrasad J Pandit1-2/+5
A guest user may set channel frame count via es1370_write() such that, in es1370_transfer_audio(), total frame count 'size' is lesser than the number of frames that are processed 'cnt'. int cnt = d->frame_cnt >> 16; int size = d->frame_cnt & 0xffff; if (size < cnt), it results in incorrect calculations leading to OOB access issue(s). Add check to avoid it. Reported-by: Ren Ding <rding@gatech.edu> Reported-by: Hanqing Zhao <hanqing@gatech.edu> Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> Message-id: 20200514200608.1744203-1-ppandit@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-05-259p: Lock directory streams with a CoMutexGreg Kurz1-4/+4
Locking was introduced in QEMU 2.7 to address the deprecation of readdir_r(3) in glibc 2.24. It turns out that the frontend code is the worst place to handle a critical section with a pthread mutex: the code runs in a coroutine on behalf of the QEMU mainloop and then yields control, waiting for the fsdev backend to process the request in a worker thread. If the client resends another readdir request for the same fid before the previous one finally unlocked the mutex, we're deadlocked. This never bit us because the linux client serializes readdir requests for the same fid, but it is quite easy to demonstrate with a custom client. A good solution could be to narrow the critical section in the worker thread code and to return a copy of the dirent to the frontend, but this causes quite some changes in both 9p.c and codir.c. So, instead of that, in order for people to easily backport the fix to older QEMU versions, let's simply use a CoMutex since all the users for this sit in coroutines. Fixes: 7cde47d4a89d ("9p: add locking to V9fsDir") Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <158981894794.109297.3530035833368944254.stgit@bahia.lan> Signed-off-by: Greg Kurz <groug@kaod.org>
2020-05-259pfs: include linux/limits.h for XATTR_SIZE_MAXDan Robertson1-0/+1
linux/limits.h should be included for the XATTR_SIZE_MAX definition used by v9fs_xattrcreate. Fixes: 3b79ef2cf488 ("9pfs: limit xattr size in xattrcreate") Signed-off-by: Dan Robertson <dan@dlrobertson.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <20200515203015.7090-2-dan@dlrobertson.com> Signed-off-by: Greg Kurz <groug@kaod.org>
2020-05-22Merge remote-tracking branch ↵Peter Maydell2-37/+42
'remotes/philmd-gitlab/tags/pflash-next-20200522' into staging - Remove unused timer in CFI01 flash, - Clean up code documentation, - Silent a long-standing Coverity warning (2016-07-15). # gpg: Signature made Fri 22 May 2020 18:43:03 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/pflash-next-20200522: hw/block/pflash: Check return value of blk_pwrite() hw/block/pflash_cfi01: Rename 'reset_flash' label as 'mode_read_array' hw/block/pflash_cfi01: Document use of non-CFI compliant command '0x00' hw/block/pflash_cfi01: Removed an unused timer Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-22hw/block/pflash: Check return value of blk_pwrite()Mansour Ahmadi2-2/+14
When updating the PFLASH file contents, we should check for a possible failure of blk_pwrite(). Similar to commit 3a688294e. Reported-by: Coverity (CID 1357678 CHECKED_RETURN) Signed-off-by: Mansour Ahmadi <mansourweb@gmail.com> Message-Id: <20200408003552.58095-1-mansourweb@gmail.com> [PMD: Add missing "qemu/error-report.h" include and TODO comment] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-05-22hw/block/pflash_cfi01: Rename 'reset_flash' label as 'mode_read_array'Philippe Mathieu-Daudé1-15/+15
Rename the 'reset_flash' as 'mode_read_array' to make explicit we do not reset the device, we simply set its internal state machine in the READ_ARRAY mode. We do not reset the status register error bits, as a device reset would do. Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20190716221555.11145-5-philmd@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-05-22hw/block/pflash_cfi01: Document use of non-CFI compliant command '0x00'Philippe Mathieu-Daudé1-5/+13
The command 0x00 is used by this model since its origin (commit 05ee37ebf630). In this commit the command is described with a amusing '/* ??? */' comment, probably meaning 'FIXME'. switch (cmd) { case 0x00: /* ??? */ ... This comment survived 12 years because the 0x00 value is indeed not specified by the CFI open standard (as of this commit). The 'cmd' field is transfered during migration. To keep the migration feature working with older QEMU version, we have to take a lot of care with migrated field. We figured out it is too late to remove a non-specified value from this model (this would make migration review very complex). It is however not too late to improve the documentation. Add few comments to remember this is a special value related to QEMU, and we won't find information about it on the CFI spec. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20190716221555.11145-3-philmd@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-05-22hw/block/pflash_cfi01: Removed an unused timerPhilippe Mathieu-Daudé1-15/+0
The 'CFI02' NOR flash was introduced in commit 29133e9a0fff, with timing modelled. One year later, the CFI01 model was introduced (commit 05ee37ebf630) based on the CFI02 model. As noted in the header, "It does not support timings". 12 years later, we never had to model the device timings. Time to remove the unused timer, we can still add it back if required. Suggested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Wei Yang <richardw.yang@linux.intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Tested-by: Laszlo Ersek <lersek@redhat.com> [Laszlo Ersek: Regression tested EDK2 OVMF IA32X64, ArmVirtQemu Aarch64 https://lists.gnu.org/archive/html/qemu-devel/2019-07/msg04373.html] Message-Id: <20190716221555.11145-2-philmd@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-05-22Merge remote-tracking branch 'remotes/mcayland/tags/qemu-openbios-20200521' ↵Peter Maydell4-0/+0
into staging qemu-openbios queue # gpg: Signature made Thu 21 May 2020 21:02:44 BST # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full] # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-openbios-20200521: Update OpenBIOS images to 4704d9eb built from submodule. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-21Merge remote-tracking branch ↵Peter Maydell37-292/+855
'remotes/pmaydell/tags/pull-target-arm-20200521-1' into staging target-arm queue: * tests/acceptance: Add a test for the canon-a1100 machine * docs/system: Document some of the Arm development boards * linux-user: make BKPT insn cause SIGTRAP, not be a syscall * target/arm: Remove unused GEN_NEON_INTEGER_OP macro * fsl-imx25, fsl-imx31, fsl-imx6, fsl-imx6ul, fsl-imx7: implement watchdog * hw/arm: Use qemu_log_mask() instead of hw_error() in various places * ARM: PL061: Introduce N_GPIOS * target/arm: Improve clear_vec_high() usage * target/arm: Allow user-mode code to write CPSR.E via MSR * linux-user/arm: Reset CPSR_E when entering a signal handler * linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32 # gpg: Signature made Thu 21 May 2020 22:05:48 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200521-1: (29 commits) linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32 linux-user/arm: Reset CPSR_E when entering a signal handler target/arm: Allow user-mode code to write CPSR.E via MSR target/arm: Use clear_vec_high more effectively target/arm: Use tcg_gen_gvec_mov for clear_vec_high ARM: PL061: Introduce N_GPIOS hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask() hw/char/xilinx_uartlite: Replace hw_error() by qemu_log_mask() hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask() hw/arm/integratorcp: Replace hw_error() by qemu_log_mask() hw/arm/fsl-imx7: Connect watchdog interrupts hw/arm/fsl-imx7: Instantiate various unimplemented devices hw/arm/fsl-imx6ul: Connect watchdog interrupts hw/arm/fsl-imx6: Connect watchdog interrupts hw/arm/fsl-imx31: Wire up watchdog hw/arm/fsl-imx25: Wire up watchdog hw/watchdog: Implement full i.MX watchdog support hw: Move i.MX watchdog driver to hw/watchdog target/arm: Remove unused GEN_NEON_INTEGER_OP macro linux-user/arm: Fix identification of syscall numbers ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-21linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32Peter Maydell1-6/+0
The Arm signal-handling code has some parts ifdeffed with a TARGET_CONFIG_CPU_32, which is always defined. This is a leftover from when this code's structure was based on the Linux kernel signal handling code, where it was intended to support 26-bit Arm CPUs. The kernel dropped its CONFIG_CPU_32 in kernel commit 4da8b8208eded0ba21e3 in 2009. QEMU has never had 26-bit CPU support and is unlikely to ever add it; we certainly aren't going to support 26-bit Linux binaries via linux-user mode. The ifdef is just unhelpful noise, so remove it entirely. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200518143014.20689-1-peter.maydell@linaro.org
2020-05-21linux-user/arm: Reset CPSR_E when entering a signal handlerAmanieu d'Antras1-1/+7
This fixes signal handlers running with the wrong endianness if the interrupted code used SETEND to dynamically switch endianness. Signed-off-by: Amanieu d'Antras <amanieu@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200511131117.2486486-1-amanieu@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-21target/arm: Allow user-mode code to write CPSR.E via MSRPeter Maydell2-1/+2
Using the MSR instruction to write to CPSR.E is deprecated, but it is required to work from any mode including unprivileged code. We were incorrectly forbidding usermode code from writing it because CPSR_USER did not include the CPSR_E bit. We use CPSR_USER in only three places: * as the mask of what to allow userspace MSR to write to CPSR * when deciding what bits a linux-user signal-return should be able to write from the sigcontext structure * in target_user_copy_regs() when we set up the initial registers for the linux-user process In the first two cases not being able to update CPSR.E is a bug, and in the third case it doesn't matter because CPSR.E is always 0 there. So we can fix both bugs by adding CPSR_E to CPSR_USER. Because the cpsr_write() in restore_sigcontext() is now changing a CPSR bit which is cached in hflags, we need to add an arm_rebuild_hflags() call there; the callsite in target_user_copy_regs() was already rebuilding hflags for other reasons. (The recommended way to change CPSR.E is to use the 'SETEND' instruction, which we do correctly allow from usermode code.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200518142801.20503-1-peter.maydell@linaro.org
2020-05-21target/arm: Use clear_vec_high more effectivelyRichard Henderson1-21/+32
Do not explicitly store zero to the NEON high part when we can pass !is_q to clear_vec_high. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200519212453.28494-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-21target/arm: Use tcg_gen_gvec_mov for clear_vec_highRichard Henderson1-8/+2
The 8-byte store for the end a !is_q operation can be merged with the other stores. Use a no-op vector move to trigger the expand_clr portion of tcg_gen_gvec_mov. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200519212453.28494-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-21ARM: PL061: Introduce N_GPIOSGeert Uytterhoeven1-5/+7
Add a definition for the number of GPIO lines controlled by a PL061 instance, and use it instead of the hardcoded magic value 8. Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200519085143.1376-1-geert+renesas@glider.be Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-21hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask()Philippe Mathieu-Daudé1-7/+5
hw_error() calls exit(). This a bit overkill when we can log the accesses as unimplemented or guest error. When fuzzing the devices, we don't want the whole process to exit. Replace some hw_error() calls by qemu_log_mask(). Per the datasheet "Exynos 4412 RISC Microprocessor Rev 1.00" Chapter 25 "Multi Core Timer (MCT)" figure 1 and table 4, the default value on the APB bus is 0. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200518140309.5220-5-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-21hw/char/xilinx_uartlite: Replace hw_error() by qemu_log_mask()Philippe Mathieu-Daudé1-2/+3
hw_error() calls exit(). This a bit overkill when we can log the accesses as unimplemented or guest error. When fuzzing the devices, we don't want the whole process to exit. Replace some hw_error() calls by qemu_log_mask(). Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200518140309.5220-4-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-21hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask()Philippe Mathieu-Daudé3-11/+18
hw_error() calls exit(). This a bit overkill when we can log the accesses as unimplemented or guest error. When fuzzing the devices, we don't want the whole process to exit. Replace some hw_error() calls by qemu_log_mask(). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200518140309.5220-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-21hw/arm/integratorcp: Replace hw_error() by qemu_log_mask()Philippe Mathieu-Daudé1-8/+15
hw_error() calls exit(). This a bit overkill when we can log the accesses as unimplemented or guest error. When fuzzing the devices, we don't want the whole process to exit. Replace some hw_error() calls by qemu_log_mask(). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200518140309.5220-2-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-21hw/arm/fsl-imx7: Connect watchdog interruptsGuenter Roeck2-0/+16
i.MX7 supports watchdog pretimeout interupts. With this commit, the watchdog in mcimx7d-sabre is fully operational, including pretimeout support. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20200517162135.110364-9-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-21hw/arm/fsl-imx7: Instantiate various unimplemented devicesGuenter Roeck2-0/+40
Instantiating PWM, CAN, CAAM, and OCOTP devices is necessary to avoid crashes when booting mainline Linux. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20200517162135.110364-8-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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