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author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-05-10 21:36:37 +0200 |
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committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-05-26 13:19:36 +0200 |
commit | 1f8a6c8b3c3a9c6ea0b215a764a1c4f1d6141078 (patch) | |
tree | d102231ca4ff7fba1872fedd8c9ed9de5cc0a674 | |
parent | 7a296990af3ae3a63e5397c9c1a9f26981815c1c (diff) | |
download | qemu-1f8a6c8b3c3a9c6ea0b215a764a1c4f1d6141078.zip qemu-1f8a6c8b3c3a9c6ea0b215a764a1c4f1d6141078.tar.gz qemu-1f8a6c8b3c3a9c6ea0b215a764a1c4f1d6141078.tar.bz2 |
hw/pci-host/bonito: Set the Config register reset value with FIELD_DP32
Describe some bits of the Config registers fields with the
registerfields API. Use the FIELD_DP32() macro to set the
BONGENCFG register bits at reset.
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Message-id: <20200510210128.18343-12-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
-rw-r--r-- | hw/pci-host/bonito.c | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index 20f2797..d0201ce 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -50,6 +50,7 @@ #include "sysemu/runstate.h" #include "exec/address-spaces.h" #include "hw/misc/unimp.h" +#include "hw/registerfields.h" /* #define DEBUG_BONITO */ @@ -112,8 +113,19 @@ /* Power on register */ #define BONITO_BONPONCFG (0x00 >> 2) /* 0x100 */ + +/* PCI configuration register */ #define BONITO_BONGENCFG_OFFSET 0x4 #define BONITO_BONGENCFG (BONITO_BONGENCFG_OFFSET >> 2) /*0x104 */ +REG32(BONGENCFG, 0x104) +FIELD(BONGENCFG, DEBUGMODE, 0, 1) +FIELD(BONGENCFG, SNOOP, 1, 1) +FIELD(BONGENCFG, CPUSELFRESET, 2, 1) +FIELD(BONGENCFG, BYTESWAP, 6, 1) +FIELD(BONGENCFG, UNCACHED, 7, 1) +FIELD(BONGENCFG, PREFETCH, 8, 1) +FIELD(BONGENCFG, WRITEBEHIND, 9, 1) +FIELD(BONGENCFG, PCIQUEUE, 12, 1) /* 2. IO & IDE configuration */ #define BONITO_IODEVCFG (0x08 >> 2) /* 0x108 */ @@ -577,11 +589,18 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num) static void bonito_reset(void *opaque) { PCIBonitoState *s = opaque; + uint32_t val = 0; /* set the default value of north bridge registers */ s->regs[BONITO_BONPONCFG] = 0xc40; - s->regs[BONITO_BONGENCFG] = 0x1384; + val = FIELD_DP32(val, BONGENCFG, PCIQUEUE, 1); + val = FIELD_DP32(val, BONGENCFG, WRITEBEHIND, 1); + val = FIELD_DP32(val, BONGENCFG, PREFETCH, 1); + val = FIELD_DP32(val, BONGENCFG, UNCACHED, 1); + val = FIELD_DP32(val, BONGENCFG, CPUSELFRESET, 1); + s->regs[BONITO_BONGENCFG] = val; + s->regs[BONITO_IODEVCFG] = 0x2bff8010; s->regs[BONITO_SDCFG] = 0x255e0091; |