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13 daysMerge tag 'pull-tcg-20241224' of https://gitlab.com/rth7680/qemu into stagingStefan Hajnoczi75-991/+848
tcg/optimize: Remove in-flight mask data from OptContext fpu: Add float*_muladd_scalbn fpu: Remove float_muladd_halve_result fpu: Add float_round_nearest_even_max fpu: Add float_muladd_suppress_add_product_zero target/hexagon: Use float32_muladd accel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_core # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmdrE7QdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+l2Qf/aECUfMn07wns7WjX # ebWxzIRKp//ktsIJg9InL8zrCStyRqrBj0VQE9LUfO2Vhvqf8faUdh+uh2ek/Ewa # f1hfo0kDK7e7oWnCicSbHmdC0FQIrKpg2i+YXIsbd4XWOkmFAhkNenISuQfCrL3k # 3UYAA12seK9uCls+fljvhK6iid3h+4ReDFW7DPg7mumFCCz6CwzYYW/4cnhcAmOn # qVehtts8W+6SFMjTE04S8NV8OBaMisf8AbCcZf2PedRl1cHGSumLOjvjOxcQU8Hw # nGUjL8/hYWkEetzU4YzJyfHOe6F9lPJBMnDattwIswwYrTOD/Sq7VbBWFbW0EwUy # 7XIZ8Q== # =DZgo # -----END PGP SIGNATURE----- # gpg: Signature made Tue 24 Dec 2024 15:04:04 EST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20241224' of https://gitlab.com/rth7680/qemu: (72 commits) accel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_core target/hexagon: Simplify internal_mpyhh setup target/hexagon: Use mulu64 for int128_mul_6464 target/hexagon: Remove Double target/hexagon: Remove Float target/hexagon: Expand GEN_XF_ROUND target/hexagon: Remove internal_fmafx target/hexagon: Use float32_muladd for helper_sffm[as]_lib target/hexagon: Use float32_muladd_scalbn for helper_sffma_sc target/hexagon: Use float32_muladd for helper_sffms target/hexagon: Use float32_muladd for helper_sffma target/hexagon: Use float32_mul in helper_sfmpy softfloat: Add float_muladd_suppress_add_product_zero softfloat: Add float_round_nearest_even_max softfloat: Remove float_muladd_halve_result target/sparc: Use float*_muladd_scalbn target/arm: Use float*_muladd_scalbn softfloat: Add float{16,32,64}_muladd_scalbn tcg/optimize: Move fold_cmp_vec, fold_cmpsel_vec into alphabetic sort tcg/optimize: Move fold_bitsel_vec into alphabetic sort ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
14 daysaccel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_coreRichard Henderson62-62/+121
Convert all targets simultaneously, as the gen_intermediate_code function disappears from the target. While there are possible workarounds, they're larger than simply performing the conversion. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystarget/hexagon: Simplify internal_mpyhh setupRichard Henderson1-1/+1
Initialize x with accumulated via direct assignment, rather than multiplying by 1. Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystarget/hexagon: Use mulu64 for int128_mul_6464Richard Henderson1-29/+3
No need to open-code 64x64->128-bit multiplication. Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystarget/hexagon: Remove DoubleRichard Henderson1-31/+17
This structure, with bitfields, is incorrect for big-endian. Use extract64 and deposit64 instead. Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystarget/hexagon: Remove FloatRichard Henderson1-13/+3
This structure, with bitfields, is incorrect for big-endian. Use the existing float32_getexp_raw which uses extract32. Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystarget/hexagon: Expand GEN_XF_ROUNDRichard Henderson1-128/+127
This massive macro is now only used once. Expand it for use only by float64. Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystarget/hexagon: Remove internal_fmafxRichard Henderson2-173/+0
The function is now unused. Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystarget/hexagon: Use float32_muladd for helper_sffm[as]_libRichard Henderson1-79/+26
There are multiple special cases for this instruction. (1) The saturate to normal maximum instead of overflow to infinity is handled by the new float_round_nearest_even_max rounding mode. (2) The 0 * n + c special case is handled by the new float_muladd_suppress_add_product_zero flag. (3) The Inf - Inf -> 0 special case can be detected after the fact by examining float_flag_invalid_isi. Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystarget/hexagon: Use float32_muladd_scalbn for helper_sffma_scRichard Henderson1-8/+3
This instruction has a special case that 0 * x + c returns c without the normal sign folding that comes with 0 + -0. Use the new float_muladd_suppress_add_product_zero to describe this. Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystarget/hexagon: Use float32_muladd for helper_sffmsRichard Henderson1-3/+2
There are no special cases for this instruction. Since hexagon always uses default-nan mode, explicitly negating the first input is unnecessary. Use float_muladd_negate_product instead. Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystarget/hexagon: Use float32_muladd for helper_sffmaRichard Henderson1-1/+1
There are no special cases for this instruction. Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystarget/hexagon: Use float32_mul in helper_sfmpyRichard Henderson3-10/+1
There are no special cases for this instruction. Remove internal_mpyf as unused. Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 dayssoftfloat: Add float_muladd_suppress_add_product_zeroRichard Henderson3-1/+11
Certain Hexagon instructions suppress changes to the result when the product of fma() is a true zero. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 dayssoftfloat: Add float_round_nearest_even_maxRichard Henderson2-0/+5
This rounding mode is used by Hexagon. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 dayssoftfloat: Remove float_muladd_halve_resultRichard Henderson3-13/+0
All uses have been convered to float*_muladd_scalbn. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystarget/sparc: Use float*_muladd_scalbnRichard Henderson3-38/+54
Use the scalbn interface instead of float_muladd_halve_result. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystarget/arm: Use float*_muladd_scalbnRichard Henderson1-3/+3
Use the scalbn interface instead of float_muladd_halve_result. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 dayssoftfloat: Add float{16,32,64}_muladd_scalbnRichard Henderson3-27/+44
We currently have a flag, float_muladd_halve_result, to scale the result by 2**-1. Extend this to handle arbitrary scaling. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Move fold_cmp_vec, fold_cmpsel_vec into alphabetic sortRichard Henderson1-30/+30
The big comment just above says functions should be sorted. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Move fold_bitsel_vec into alphabetic sortRichard Henderson1-55/+59
The big comment just above says functions should be sorted. Add forward declarations as needed. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Re-enable sign-mask optimizationsRichard Henderson1-2/+2
All instances of s_mask have been converted to the new representation. We can now re-enable usage. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Remove z_mask, s_mask from OptContextRichard Henderson1-13/+0
All mask setting is now done with parameters via fold_masks_*. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use finish_folding as default in tcg_optimizeRichard Henderson1-4/+2
All non-default cases now finish folding within each function. Do the same with the default case and assert it is done after. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use finish_folding in fold_bitsel_vecRichard Henderson1-1/+1
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use fold_masks_zs in fold_xorRichard Henderson1-10/+8
Avoid the use of the OptContext slots. Find TempOptInfo once. Remove fold_masks as the function becomes unused. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use finish_folding in fold_tcg_ld_memcopyRichard Henderson1-1/+1
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use fold_masks_zs in fold_tcg_ldRichard Henderson1-7/+9
Avoid the use of the OptContext slots. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use finish_folding in fold_sub, fold_sub_vecRichard Henderson1-3/+6
Duplicate fold_sub_vec into fold_sub instead of calling it, now that fold_sub_vec always returns true. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Simplify sign bit test in fold_shiftRichard Henderson1-3/+2
Merge the two conditions, sign != 0 && !(z_mask & sign), by testing ~z_mask & sign. If sign == 0, the logical and will produce false. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use fold_masks_zs, fold_masks_s in fold_shiftRichard Henderson1-13/+14
Avoid the use of the OptContext slots. Find TempOptInfo once. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use fold_masks_zs in fold_sextractRichard Henderson1-15/+9
Avoid the use of the OptContext slots. Find TempOptInfo once. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use finish_folding in fold_cmpsel_vecRichard Henderson1-1/+1
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use finish_folding in fold_cmp_vecRichard Henderson1-1/+1
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use fold_masks_z in fold_setcond2Richard Henderson1-2/+1
Avoid the use of the OptContext slots. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use fold_masks_s in fold_negsetcondRichard Henderson1-2/+1
Avoid the use of the OptContext slots. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use fold_masks_z in fold_setcondRichard Henderson1-2/+1
Avoid the use of the OptContext slots. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Distinguish simplification in fold_setcond_zmaskRichard Henderson1-8/+14
Change return from bool to int; distinguish between complete folding, simplification, and no change. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use finish_folding in fold_remainderRichard Henderson1-1/+1
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Return true from fold_qemu_st, fold_tcg_stRichard Henderson1-6/+5
Stores have no output operands, and so need no further work. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use fold_masks_zs in fold_qemu_ldRichard Henderson1-5/+21
Avoid the use of the OptContext slots. Be careful not to call fold_masks_zs when the memory operation is wide enough to require multiple outputs, so split into two functions: fold_qemu_ld_1reg and fold_qemu_ld_2reg. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use fold_masks_zs in fold_orcRichard Henderson1-3/+5
Avoid the use of the OptContext slots. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use fold_masks_zs in fold_orRichard Henderson1-5/+8
Avoid the use of the OptContext slots. Find TempOptInfo once. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use fold_masks_s in fold_notRichard Henderson1-6/+1
Avoid the use of the OptContext slots. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use fold_masks_s in fold_norRichard Henderson1-3/+5
Avoid the use of the OptContext slots. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use fold_masks_z in fold_neg_no_constRichard Henderson1-7/+2
Avoid the use of the OptContext slots. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use fold_masks_s in fold_nandRichard Henderson1-3/+5
Avoid the use of the OptContext slots. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use finish_folding in fold_mul*Richard Henderson1-3/+3
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use fold_masks_zs in fold_movcondRichard Henderson1-8/+11
Avoid the use of the OptContext slots. Find TempOptInfo once. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14 daystcg/optimize: Use fold_masks_z in fold_extuRichard Henderson1-2/+2
Avoid the use of the OptContext slots. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
generated by cgit v1.1 at 2025-01-07 16:28:57 +0000