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| author | Richard Henderson <richard.henderson@linaro.org> | 2024-12-07 18:06:30 -0600 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-12-24 08:32:15 -0800 |
| commit | 6a243913aa46f3d60ce36c7a826562c6e40b64d7 (patch) | |
| tree | 6aebca600cd21763a6d01222922e057052397186 | |
| parent | 88d5f550bd570cd2837c0316bea6bae8cb4b745a (diff) | |
| download | qemu-6a243913aa46f3d60ce36c7a826562c6e40b64d7.zip qemu-6a243913aa46f3d60ce36c7a826562c6e40b64d7.tar.gz qemu-6a243913aa46f3d60ce36c7a826562c6e40b64d7.tar.bz2 | |
softfloat: Remove float_muladd_halve_result
All uses have been convered to float*_muladd_scalbn.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | fpu/softfloat-parts.c.inc | 4 | ||||
| -rw-r--r-- | fpu/softfloat.c | 6 | ||||
| -rw-r--r-- | include/fpu/softfloat.h | 3 |
3 files changed, 0 insertions, 13 deletions
diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc index 4a62d6c..a724f31 100644 --- a/fpu/softfloat-parts.c.inc +++ b/fpu/softfloat-parts.c.inc @@ -653,10 +653,6 @@ static FloatPartsN *partsN(muladd_scalbn)(FloatPartsN *a, FloatPartsN *b, a->exp = p_widen.exp; return_normal: - /* TODO: Replace all use of float_muladd_halve_result with scale. */ - if (flags & float_muladd_halve_result) { - a->exp -= 1; - } a->exp += scale; finish_sign: if (flags & float_muladd_negate_result) { diff --git a/fpu/softfloat.c b/fpu/softfloat.c index b5936cc..6967fb5 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -2274,9 +2274,6 @@ float32_muladd(float32 xa, float32 xb, float32 xc, int flags, float_status *s) if (unlikely(!can_use_fpu(s))) { goto soft; } - if (unlikely(flags & float_muladd_halve_result)) { - goto soft; - } float32_input_flush3(&ua.s, &ub.s, &uc.s, s); if (unlikely(!f32_is_zon3(ua, ub, uc))) { @@ -2345,9 +2342,6 @@ float64_muladd(float64 xa, float64 xb, float64 xc, int flags, float_status *s) if (unlikely(!can_use_fpu(s))) { goto soft; } - if (unlikely(flags & float_muladd_halve_result)) { - goto soft; - } float64_input_flush3(&ua.s, &ub.s, &uc.s, s); if (unlikely(!f64_is_zon3(ua, ub, uc))) { diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index c34ce04..aa69aec 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -120,14 +120,11 @@ bfloat16 bfloat16_squash_input_denormal(bfloat16 a, float_status *status); | Using these differs from negating an input or output before calling | the muladd function in that this means that a NaN doesn't have its | sign bit inverted before it is propagated. -| We also support halving the result before rounding, as a special -| case to support the ARM fused-sqrt-step instruction FRSQRTS. *----------------------------------------------------------------------------*/ enum { float_muladd_negate_c = 1, float_muladd_negate_product = 2, float_muladd_negate_result = 4, - float_muladd_halve_result = 8, }; /*---------------------------------------------------------------------------- |